Differential subtracter improved for higher accuracy and A/D converter including the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsHiroyuki Kouno, Takahiro Miki, Toshio Kumamoto
Life of this patent
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Abstract
An improved differential subtracter 3a and an improved D/A converter 7a are used in a two-step parallel A/D converter 100. The D/A converter is responsive to complementary signals S1-S2 and B1-Bn indicative of results of conversion of higher bits to draw subtraction currents Is1 and Is2 through emitter electrodes of npn transistors Q1 and Q2. Since a difference between emitter currents I.sub.E1 and I.sub.E2 is small, base-emitter voltages V.sub.BE1 and V.sub.BE2 are substantially equal to each other. As a result, the A/D converter can execute the subtraction at high speed with high accuracy.
Claims16
A differential subtracter circuit for subtracting a second differential signal defined by third and fourth input signals from a first differential signal defined by first and second input signals, comprising:
- a first bipolar transistor having a base electrode connected to receive said first input signal and an emitter electrode connected to receive said third input signal;
- a second bipolar transistor having a base electrode connected to receive said second input signal and an emitter electrode connected to receive said fourth input signal;
- a first constant current source connected between a first supply potential and said emitter electrode of said first bipolar transistor;
- a second constant current source connected between said first supply potential and said emitter electrode of said second bipolar transistor;
- first resistor means connected between a second supply potential and a collector electrode of said first bipolar transistor;
- second resistor means connected between said second supply potential and a collector electrode of said second bipolar transistor;
- and
- emitter resistor means connected between said emitter electrodes of said first and second bipolar transistors, wherein
- a subtraction differential signal indicative of a result of subtraction is outputted through said collector electrodes of said first and second bipolar transistors.
An A/D converter for converting an input differential signal defined by first and second input signals into a digital signal including a higher bit signal and a lower bit signal, comprising:
- means for generating a plurality of coarse reference voltages and a plurality of fine reference voltages for A/D conversion;
- first A/D converter means for comparing said input differential signal with said plurality of coarse reference voltages to output said higher bit signal;
- D/A converter means for converting said higher bit signal into a corresponding middle differential signal defined by first and second middle signals;
- differential subtracter means for subtracting said middle differential signal from said input differential signal to output a subtraction differential signal;
- and
- second A/D converter means for comparing said subtraction differential signal with said plurality of fine reference voltages to output said lower bit signal, wherein
- said differential subtraction means includes:
- a first bipolar transistor having a base electrode connected to receive said first input signal and an emitter electrode connected to receive said first middle signal;
- a second bipolar transistor having a base electrode connected to receive said second input signal and an emitter electrode connected to receive said second middle signal;
- a first constant current supply connected between a first supply potential and said emitter electrode of said first bipolar transistor;
- a second constant current supply connected between said first supply potential and said emitter electrode of said second bipolar transistor;
- first resistor means connected between a second supply potential and a collector electrode of said first bipolar transistor;
- and
- second resistor means connected between said second supply potential and a collector electrode of said second bipolar transistor;
- wherein
- said subtraction differential signal is supplied to said second A/D converter means through said collector electrodes of said first and second bipolar transistors.
A differential subtracter circuit for subtracting a second differential signal defined by third and fourth input signals from a first differential signal defined by first and second input signals, comprising:
- a first bipolar transistor having a base electrode connected to receive said first input signal and an emitter electrode connected to receive said third input signal;
- a second bipolar transistor having a base electrode connected to receive said second input signal and an emitter electrode connected to receive said fourth input signal;
- a first constant current source connected between a first supply potential and said emitter electrode of said first bipolar transistor;
- a second constant current source connected between said first supply potential and said emitter electrode of said second bipolar transistor;
- first resistor means connected between a second supply potential and a collector electrode of said first bipolar transistor;
- second resistor means connected between said second supply potential and a collector electrode of said second bipolar transistor;
- and
- amplitude restricting means connected between said collector electrodes of said first and second bipolar transistors for restricting an amplitude of said subtraction differential signal within a predetermined range, wherein
- a subtraction differential signal indicative of a result of subtraction is outputted through said collector electrodes of said first and second bipolar transistors.
Dependencies are inferred from the claim text.