Probe for jesting an electrical circuit chip

A probe for testing an electrical circuit chip carried on a circuit wafer, said probe comprising:

• a substrate having a dimension and configuration like said circuit wafer, and an edge section means for enabling handling and orientation,
• a flexible membrane carried by said substrate,
• a plurality of contact pads on said membrane,
• a plurality of electrical conductors on said membrane and electrically connected to said contact pads, and
• means defined by said probe for detachably connecting said probe by vacuum both mechanically and electrically to a test fixture.

A probe for testing electrical circuit chip comprising:

• a substrate having first and second sides,
• a flexible membrane fixed to said first side, said membrane having inner and outer sides
• a plurality of electrically conductive traces on said membrane outer side,
• a plurality of contact pads formed on selected ones of said traces,
• a plurality of ground strips on said membrane inner side, and
• a terminating resistor on said membrane at one of said plurality of contact pads and electrically interconnecting said one contact pad and one of said plurality of ground strips.

A probe for testing electrical circuit chip carried on a circuit wafer, said probe comprising:

• a substrate having a dimension and configuration like said circuit wafer and having first and second sides,
• a flexible membrane fixed to said first side,
• a plurality of electrically conductive traces formed on said membrane,
• a plurality of contact pads formed on selected ones of said traces,
• a well formed in said substrate,
• at least one active buffer chip mounted in said well and electrically connected to at least one of said conductive traces, and
• means for electrically connecting said buffer chip to an external test circuit.