Comparator circuit with precision hysteresis and high input impedance

A comparator circuit will hysteresis including:

• an input stage with first and second transistors, the bases of which receive respective input signals which together define an input difference signal, respective resistors being connected to the emitters of the first and second so that the respective emitter resistors determine the intensities of the variations in the collector currents induced in the first and second transistors by variations in the input difference signal;
• a differential stage with a first differential stage transistor and a second differential stage transistor, the bases of which are sensitive to the collector currents of the first and second transistors, respectively, the emitters of the first and second differential stage transistors being connected to a constant-current source and at least one of the first and second differential stage transistors driving the output of the circuit;
• and
• first and second further transistors interposed between the first transistor and the first differential stage transistor and between the second transistor and the second differential stage transistor, respectively, for transferring the collector currents of the first transistor and of the second transistor to the bases of the first and second differential stage transistors, respectively, the arrangement being such that the differential stage permits first and second operating conditions, in which the constant current passing respectively through the first and second differential stage transistors and the output of the circuit assumes two different respective levels, the switching between the first and second operating condition and between the second and first operating condition taking place respectively at a first level and at a second level of the input signal difference the difference between the first and second difference signal levels defining the hysteresis and being univocally determined by the resistances of the emitter resistors and by the value of the constant current.

A comparator circuit with hysteresis including:

• an input stage with first and second transistors, the bases of which receive respective input signals which together define an input difference signal, respective resistors being connected to the emitters of the first and second so that the respective emitter resistors determine the intensities of the variations in the collector currents induced in the first and second transistors by variations in the input difference signal;
• a differential stage with first and second differential stage transistors, the bases of which are sensitive to the collector currents of the first and second transistors, respectively, the emitters of the first and second differential stage transistors being connected to a constant-current source and at least one of the first and second differential stage transistors driving the output of the circuit;
• and
• protective transistor interposed between the bases of the first and second differential stage transistors for preventing the base of the transistor, of the first and second differential stage transistors, which drives the output of the circuit, from reaching the level of the supply voltage, the arrangement being such that the differential stage permits first and second operating conditions, in which the constant current passing respectively through the first and second differential stage transistors and the output of the circuit assumes two different respective levels, the switching between the first and second operating conditions and between the second and first operating conditions taking placing respectively at a first level and at a second level of the input signal difference the difference between the first and second difference signal level defining the hysteresis and being univocally determined by the resistances of the emitter resistors and by the value of the constant current.

A comparator circuit with hysteresis, comprising:

• an input stage having first and second branches, each with an input terminal, and receiving first and second input signals, respectively, to define an input difference signal, said first and second branches having an electrical current flowing therein, a value of said first and second currents being determined by first and second resistors in said first and second branches, respectively;
• a differential stage having first and second differential branches electrically coupled to said input stage and responsive to said first and second currents, said differential stage being biased by a constant current source, said first differential branch providing a feedback connection to said input stage to provide a hysteresis for the circuit;
• and
• an output stage electrically coupled to said differential stage and receiving a differential stage output signal from said differential stage, said output stage switching between first and second output voltage levels, said switching from said first output voltage level to said second output voltage level and from said second output voltage level to said first output voltage level taking place at a first level and a second level of said input difference signal, respectively, the difference between first and second levels defining said hysteresis and being determined by resistance values of said first and second resistors and the value of said constant current source.