Substrate slew circuit providing reduced electron injection

A device comprising:

• a) a semiconductor substrate;
• b) one of a source/drain of a first transistor connected to said substrate, the other of a source/drain of said first transistor connected to a substantially constant reference voltage;
• c) one of a source/drain of a second transistor connected to a gate of said first transistor, the other of a source/drain of said second transistor coupled to receive a first voltage signal;
• and
• d) a circuit connected to the gate of said second transistor for controlling the passage of current from said other of said source/drain of said second transistor to said one of a source/drain of said second transistor, said circuit comprising:
• (i) a delay circuit having an input coupled to receive a first clock signal and a logic gate having a first input coupled to receive said first clock signal, a second input of said logic gate coupled to an output of said delay circuit and an output coupled to an input of an inverter, an output of said inverter coupled to a first plate of a capacitive element and a second plate of said capacitive element coupled to said gate of said second transistor;
• and
• (ii) one of a source/drain of a third transistor rand one of a source/drain of a fourth transistor coupled to receive said first voltage signal, a gate of said third transistor connected to said substrate and a gate of said fourth transistor coupled to receive a second voltage signal, the other of said source/drain of said third transistor and the other source/drain of said fourth transistor coupled to said gate of said second transistor.

A device, comprising:

• a semiconductor substrate;
• one of source/drain of a first transistor connected to said substrate, the other of a source/drain of said first transistor directly connected to a DC voltage;
• and
• a first terminal of a second transistor directly connected to a gate of said first transistor, a second terminal of said second transistor coupled to receive a controlled AC signal, an a third terminal of said second transistor connected to a voltage generating circuit.