Semiconductor integrated circuit device

A semiconductor integrated circuit device, comprising:

• a semiconductor chip;
• a CMOS circuit part formed by CMOS elements which are provided on said semiconductor chip, said CMOS circuit part including a control signal generation part for outputting a control signal in response to a data signal supplied thereto;
• a bipolar circuit part formed by bipolar elements which are provided on said semiconductor chip;
• an external power source terminal for receiving a predetermined power source voltage;
• a first power supply pad mounted on said semiconductor chip, said first power supply pad being electrically connected to said external power source terminal;
• a voltage reduction circuit mounted on said semiconductor chip, said voltage reduction circuit being electrically inserted between said first power supply pad and a power source voltage supplying portion of said bipolar circuit part, said voltage reduction circuit reducing said power source voltage in accordance with said control signal thereby to obtain a reduced power source voltage and outputting said reduced power source voltage to said power source voltage supplying portion of said bipolar circuit part;
• and
• a second power supply pad mounted on said semiconductor chip, said second power supply pad being electrically inserted between a power source voltage supplying portion of said CMOS circuit part and said external power source terminal.

A semiconductor integrated circuit device, comprising:

• a semiconductor chip;
• a CMOS circuit part formed by CMOS elements which are provided on said semiconductor chip, said CMOS circuit part including a control signal generation part for outputting a control signal in response to a data signal supplied thereto;
• a bipolar circuit part formed by bipolar elements which are provided on said semiconductor chip;
• an external power source terminal for receiving a predetermined power source voltage;
• a first power supply pad mounted on said semiconductor chip, said first power supply pad being electrically connected to said external power source terminal;
• a voltage reduction circuit mounted on said semiconductor chip, said voltage reduction circuit being electrically inserted between said first power supply pad and a power source voltage supplying portion of said CMOS circuit part, said voltage reduction circuit reducing said power source voltage in accordance with said control signal thereby to obtain a reduced power source voltage and outputting said reduced power source voltage to said power source voltage supplying portion of said CMOS circuit part;
• and
• a second power supply pad mounted on said semiconductor chip, said second power supply pad being electrically inserted between a power source voltage supplying portion of said bipolar circuit part and said external power source terminal.