Techniques for forming isolation structures

A method of forming isolating structures between diffusion regions areas in a semiconductor device, consisting essentially of:

• on a silicon wafer having a surface, forming a trench ("bathtub") having sidewalls into the surface between diffusion regions;
• forming a thin layer of thermal oxide over the surface of the wafer, the thin layer coating the sidewalls of the trench and the surface of the wafer in the diffusion regions;
• overfilling the bathtub with a layer of material selected form the group of polysilicon or amorphous silicon;
• polishing the layer of material overfilling the bathtub until it is gouged out within the bathtub, and allowing a thin remnant of the layer of the material to remain over the diffusion regions for formation of subsequent structures over the diffusion regions;
• and
• thermally treating the wafer until the gouged out layer within the bathtub is substantially planar with the diffusion regions;
• wherein:
• the thin layer of oxide formed prior to overfilling the bathtub is from 400-600.ANG. thick;
• the bathtub has a depth "h";
• the layer of material overfilling the bathtub is deposited to a thickness greater than "h";
• and
• the polishing step is performed with chem-mech polishing techniques.

A method of forming isolation structures between diffusion regions areas in a semiconductor device, comprising:

• on a silicon wafer having a surface, forming at least one initial isolation structure adjacent at least one diffusion area, wherein the diffusion area is substantially level with the surface of the wafer and the initial isolation structure extends above the surface of the wafer;
• prior to forming the at least one initial isolation structure, forming a thin layer of thermal oxide over the entire surface of the wafer, including over the at least one diffusion area;
• forming the at least one isolation structure by overfilling at least one trench in the surface of the silicon wafer with a layer of material selected from the group of polysilicon or amorphous silicon;
• polishing the wafer and thinning the initial isolation structure to form a gouged out area in the isolation structure that is below the surface of the wafer, and allowing a thin remnant of the layer of material to remain over the at least one diffusion area for formation of subsequent structures over the at least one diffusion area;
• and
• subsequently thermally treating the wafer so that the isolation structure thickness and is finally level with the surface of the diffusion area.