Method and apparatus for implementing post-modulation error correction coding scheme
OwnerBoris Fitingof, Masud Mansuripurinventors
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Abstract
A method of and apparatus for providing error correction coding for a block of user data in which the user data is initially modulated by a first modulator and then the modulated user data is error correction encoded to produce a first plurality of check bits. The first plurality of check bits are then modulated by a second modulator whose output is then fed to a second error correction encoder which produces a second plurality of check bits. The modulated user data, the first plurality of check bits and the second plurality of check bits are all fed to a shift register where the error correction encoded user data block is formed, useful with magnetic and optical storage devices.
Claims4
A method of providing burst error correction coding for a block of user data of length N, comprising the steps of:
- inputting said block of user data into a first shift register having a plurality of blocks of length k, said shift register having a total length N;
- generating a k plurality of parity bits using the user data from each of the plurality of blocks of length k;
- separately modulating and error correction coding each one of said plurality of blocks of length k and said k plurality of parity bits;
- and
- assembling a burst error correction coded block of user data by storing the results from modulation error correction coding said plurality of blocks of length k and said k plurality of parity bits sequentially following each other in a second shift register.
A method of providing burst error correction coding for a block of user data of length N, comprising the steps of:
- modulating and error correction coding said block of user data of length N to produce a coded data block;
- inputting said coded data block into a first shift register having a plurality of blocks of length k, said shift register having a length N;
- generating a k plurality of parity bits using the contents from each of the plurality of blocks of length k;
- modulating and error correction coding said k plurality of parity bits;
- and
- storing said modulated and error correction coded k plurality of bits following said coded data block as contents of a second shift register, thus forming a block of burst error correction coded user data.
Dependencies are inferred from the claim text.