Highly-efficient time-division data multiplexing apparatus

A time-division data multiplexing apparatus comprising:

• first through Nth memories for temporarily storing first through Nth data blocks, where N is an integer of at least 2;
• first through Nth address control circuits for controlling said firs through Nth memories, respectively, any nth address control circuit of said first through Nth address control circuits, where n=1, 2, . . . , N, comprising means for calculating a time period A.sub.n of an nth time slot to be assigned to a corresponding nth data block from a data size M.sub.n of the nth data block stored in a corresponding nth memory and an available time period T.sub.n indicated by an available time signal as a time period available for transmission of the nth through Nth data blocks, and means for controlling the nth memory so as to read out data of the nth data block stored in the nth memory for the time period A.sub.n and for outputting for the time period A.sub.n a selection signal S.sub.n indicating that the nth data block stored in the nth memory is being read out;
• and
• a selecting means coupled to said first through Nth memories and responsive to the selection signal S.sub.n for selectively outputting the nth data block read out from the nth memory to form a time-division multiplexed data which are composed of the fist through Nth data blocks which are respectively assigned to first through Nth time slots,
• wherein any nth address control circuit of first through (N-1) th address control circuits of said first through Nth address control circuits, where (n=1, 2, . . . , N-1), includes means for calculating a difference between the available time period T.sub.n and the time period A.sub.n of the nth time slot and for supplying an (n+1)th address control circuit with said difference as an available time signal indicative of an available time period T.sub.n+1 available for transmission of the (n+1)th through Nth data blocks.