SONET DS-N desynchronizer

An apparatus for receiving a stream of SONET data including overhead information and a SONET SPE payload for desynchronizing the SONET SPE payload to a DS-N type data, comprising:

• buffer means for storing said SONET SPE payload at a location corresponding to a first count at a first rate, and for outputting DS-N type data from a location corresponding to a second count at a second rate;
• clock means, responsive to a control signal, for generating a desynchronized clock having a frequency equal to said second rate;
• and
• microcontroller, responsive to a difference between said first and second counts and to at least a portion of said overhead information, for generating said control signal so as to adjust said second rate such that said difference between said first and second count is maintained at a predetermined value.

An apparatus for desynchronizing a SONET SPE payload to a DS-N type data, comprising:

• a write counter generating a write count in synchronism with a first clock having a first frequency;
• a read counter generating a read count in synchronism with a desychronized clock having a second frequency;
• an elastic store coupled to said write counter and read counter for storing said SONET SPE payload at a location corresponding to said write count in synchronism with said first clock, and for outputting DS-N type data from a location corresponding to said read count in synchronism with said desynchronized clock;
• buffer offset register coupled to said write counter and read counter for determining a difference between said write count and said read count, and for outputting an offset signal representative thereof;
• a direct-digital synthesis circuit responsive to a control signal for producing a signal having a variable frequency;
• an oscillator for generating a signal having a predetermined frequency;
• a mixer for producing said desynchronized clock having said second frequency which is equal to the sum of said variable frequency and said predetermined frequency;
• and
• a controller coupled to said buffer offset register and responsive to said offset signal for generating said control signal so as to adjust said second frequency of said desynchronized clock such that said difference between said write count and said read count is maintained at a predetermined value.

An apparatus for receiving a stream of SONET data including overhead information and a SONET SPE payload for desynchronizing the SONET SPE payload to a DS-N type data, comprising:

• a write counter generating a write count in synchronism with a first clock having a first frequency;
• a read counter generating a read count in synchronism with a desynchronized clock having a second frequency;
• an elastic store coupled to said write counter and read counter for storing said SONET SPE payload at a location corresponding to said write count in synchronism with said first clock, and for outputting DS-N type data from a location corresponding to said read count in synchronism with said desynchronized clock;
• buffer offset register, coupled to said write counter and read counter and responsive to at least a portion of said overhead information, for determining a difference between said write count and said read count in response to said portion of overhead information, and for outputting an offset signal representative thereof;
• a digitally controlled voltage controlled oscillator, responsive to a control signal, for producing said desynchronized clock;
• and
• a controller coupled to said buffer offset register and responsive to said offset signal for generating said control signal so as to adjust said second frequency of said desynchronized clock such that said difference between said write count and said read count is maintained at a predetermined value.

A method of desynchronizing a SONET SPE payload to DS-N type data, comprising the steps of:

• receiving a stream of SONET data including overhead information and the SONET SPE payload;
• incrementing a first counter to produce write address data in synchronism with a SONET clock;
• writing said SONET SPE payload to a location in a buffer corresponding to said write address data in synchronism with said
• incrementing a second counter to produce read address data in synchronism with a desynchronized clock;
• reading said DS-N type data from a location in said buffer corresponding to said read address data in synchronism with said desynchronized clock;
• determining a difference between said write address data and said read address data in accordance with at least a portion of the SONET overhead information.
• calculating an offset signal in accordance with said difference between said write address data and said read address data;
• calculating a frequency adjustment signal corresponding to said offset signal;
• and
• adjusting a frequency of said desynchronized clock to maintain the difference between said write address data and said read address data at a predetermined value.