CPU with integrated multiply/accumulate unit

A data processing system that executes program instructions and processes data retrieved by the data processing system from a system memory, wherein the system memory includes a plurality of external registers each having a unique address associated therewith and further comprising a first group of external registers, including a top register and a bottom register, for storing data samples, and a second group of external registers for storing data coefficients, the data processing system comprising:

• a system bus connectable to the system memory;
• a central processing unit including a plurality of internal registers for storing data therein and further including bus interface means connected to the system memory via the system bus for transferring data from the system memory to the system bus, said internal registers comprising a plurality of pointers including a first pointer for storing the address of the top register, a second pointer for storing the address of the bottom register, a third pointer for storing the address of the current data sample, and a fourth pointer for storing the address of the current data coefficient;
• a multiply/accumulate unit connected to the system bus for retrieving data from the system memory and for performing sequential multiply and accumulate operations with the data samples and data coefficients;
• wherein the central processing unit is responsive to a multiply/accumulate program instruction whereby the pointers are controlled by the central processing unit in parallel with the sequential multiply and accumulate operations.

A sequential method for performing a multiply and accumulate operation utilizing a data processing system comprising a system bus connectable to an external memory, a central processing unit including a plurality of internal registers for storing data therein and further including bus interface means connected to the external memory via the system bus for transferring data from the external memory to the system bus, said external memory comprising a plurality of external registers each having a unique address associated therewith and further first group of registers, including a top register and a bottom register, for storing data samples, and a second group of registers for storing data coefficients, said internal registers comprising a plurality of pointers including a first pointer for storing the address of the top register, a second pointer for storing the address of the bottom register, a third pointer for storing the address of the current data sample, and a fourth pointer for storing the address of the current data coefficient, and a multiply/accumulate unit connected to the system bus for retrieving data from the external memory and for performing sequential multiply and accumulate operations with the data samples and data coefficients, the method comprising the steps of;

• (a) the bus interface means fetching the current data sample from the first group of external registers;
• (b) the multiply/accumulate unit retrieving the current data sample from the bus interface means;
• (c) the bus interface means fetching the current data coefficient from the second group of external registers at the address indicated by the fourth pointer;
• (d) the multiply/accumulate unit retrieving the current data coefficient from the bus interface means;
• (e) the central processing unit incrementing the third pointer and then comparing the value of the third pointer to the value of the second pointer, and if the value of the third pointer is greater than the value of the second pointer, then loading the value of the first pointer into the third pointer;
• and
• (f) simultaneously multiplying in the multiply/accumulate unit the data sample and the data coefficient while returning to step (a).