Digital multiplier-accumulator

A circuit for performing a sum of products operation on a plurality of digitally coded and weighted groups of signals to yield an analog result, each group of signals comprising a plurality of elements, each element comprising a plurality of individual signals, each individual signal having a sign portion and a magnitude portion, the circuit comprising:

• a circuit output node;
• a digital multiplier having an output and a plurality of inputs, a first one of said plurality of inputs being connected to receive the sign portion of a first individual signal of a first element of a first group of said digitally coded and weighted groups of signals, a second one of said plurality of inputs being connected to receive the sign portion of a first individual signal of a first element of a second group of said digitally coded and weighted groups of signals, said digital multiplier producing a digital product at the output of the digital multiplier;
• and an analog multiplier having an output and a plurality of inputs, a first one of said plurality of inputs being connected to receive the digital product from the output of the digital multiplier, a second one of said plurality of inputs being connected to receive the magnitude portion of the first individual signal of the first element of the first group of said digitally coded and weighted groups of signals, a third one of said plurality of inputs being connected to receive the magnitude portion of the first individual signal of the first element of the second group of said digitally coded and weighted groups of signals, a fourth one of said plurality of inputs being connected to receive a scale factor, said analog multiplier producing an analog signal at the output of the analog multiplier, the output of the analog multiplier being connected to the circuit output node.