A circuit for faithfully converting an analog audio or like data signal into an equivalent digital signal, said circuit having a first clock signal of a first predetermined frequency provided thereto, said circuit comprising:
- means for receiving said analog audio or like data signal and then converting said analog audio or like data signal into said equivalent digital signal;
- said equivalent digital signal having a plurality of digital data samples, each of said digital data samples having a plurality of data bits;
- first counting means responsive to said first clock signal providing a second clock signal having a second predetermined frequency, and a plurality of digital addresses;
- said second clock signal being supplied to said converting means so as to effect the frequency at which said converting means samples said analog audio or like data signal;
- first random number generating means responsive to each of said digital addresses provided by said first counting means generating a random binary number, each of said random binary numbers generated by said first random number generating means being the dither component to be added to one digital data sample of said digital equivalent signal, said first random number generating means providing for each random binary number generated thereby a sign bit indicative of whether said random binary number is positive or negative;
- first adding means for adding said dither components to said digital data samples of said equivalent digital signal and for eliminating at least one bit from each digital data sample with dither added thereto, said first adding means providing a carry bit indicative of when the magnitude of any of said digital data samples with dither added thereto exceeds the maximum value of the binary number which may be provided by said first adding means after said first adding means adds said dither component to said digital data sample;
- first clipping circuit means for receiving each digital data sample of said equivalent data signal from said first adding means, said first clipping circuit means responsive to said carry bit provided by said first adding means and said sign bit provided by said first random number generating means allowing said digital data sample to pass therethrough or setting each data bit of said digital data sample to a predetermined logic state;
- second counting means responsive to said first clock signal providing a plurality of digital addresses, said plurality of digital addresses provided by said second counting means being synchronized with said plurality of digital addresses provided by said first counting means;
- second random number generating means responsive to each of said digital addresses provided by said second counting means generating a random binary number, each of said random binary numbers generated by said second random number generating means being the twos complement of one of the dither components added to said equivalent digital signal by said first adding means, said second random number generating means providing for each random binary number generated thereby a sign bit indicative of whether said random binary number is positive or negative;
- second adding means for adding said binary numbers generated by said second random number generating means to said digital data samples of said equivalent digital signal thereby eliminating the dither component from each digital data sample of said equivalent digital signal, said second adding means providing a carry bit indicative of when the magnitude of any of said digital data samples with dither removed therefrom exceeds the maximum value of the binary number which may be provided by said second adding means after said second adding means removes said dither component from said digital data sample;
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- second clipping circuit means for receiving each digital data sample of said equivalent data signal from said second adding means, said second clipping circuit means responsive to said carry bit provided by said second adding means and said sign bit provided by said second random number generating means allowing said digital data sample to pass therethrough or setting each data bit of said digital data sample to a predetermined logic state.