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US 5,311,069 AGranted
Driver circuitry for commutated inductive loads
AssigneeSilicon Systems, Inc.
InventorCharles C. Austin
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AssigneeSilicon Systems, Inc.
InventorCharles C. Austin
Estimating the term…
The present invention provides driver circuitry for commutated inductive loads, and in particular, inductive loads employed in multi-pole DC brushless motors. The preferred embodiment of the present invention typically implements three pull-up and three pull-down drivers for motor control. The pull-down driver circuit described in the present invention can be configured to be adjusted by an external component of the integrated circuit implementation in order for controlling turn-off transients. Voltage transients due to changes in load current in the control loop of the pull-down driver circuit can be minimized or deterministically controlled by controlling the rate of change of the input voltage. For the case of when the load current is to be completely switched from one inductor to another inductor, an additional unity gain buffer coupled to the input voltage is inserted into the control loop of the pull-down driver circuit for reducing the voltage transients that can result. The output voltage rise and fall times of the pull-up driver circuit of the present invention can be controlled by means of an accurate clock rate, a capacitance ratio value, an arbitrary voltage supply or by any combination of the above means. The present invention also provides circuitry for controlling the pull-up driver circuit and the pull-down driver circuits as required to assert the floating operation and as well dynamic breaking operation. The present invention is able to assert these operations by operating from either the power supply or from an energy storage capacitor that is charged to a value closely approximating the power supply voltage should the power supply be removed.
A transconductance amplifier loop used as a pull-down driver circuit for commutating inductive loads comprising:
A pull-down driver circuit that reduces voltage transients that result when switching a load current from a first inductor to a second inductor comprising:
A method for controlling the output voltage rise and fall times of a pull-up driver circuit used in commutating of inductive loads comprising the steps of:
A circuit coupled to pull-down and pull-up drivers circuits used for commutating inductive loads where said circuit disables and activates said pull-up and pull-down drivers circuits for asserting the desired operation, said circuit comprising:
A circuit that reduces voltage transients that result when switching a load current comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
No related US applications are recorded in the indexed filing history.
Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position;…:…
Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position;…:…
Modifications for ensuring a fully conducting state: in field-effect transistor switches
By feedback from the output circuit to the control circuit: soft switching
Term ended 6 Sep 2011 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
1. Field of the Invention
This invention is directed to the field of providing commutation control of inductive loads, and in particular, circuitry for use in controlling multi-pole DC brushless motors.
2. Background Art
FIG. 1 is a block diagram illustrating three pull-down driver circuits, inductive loads, and the commutation switching configuration of the present invention.
FIG. 2 is a circuit diagram illustrating details of a first embodiment of the pull-down circuit transconductance control loop of the present invention.
FIG. 3 is a circuit diagram illustrating the first embodiment of the transient suppression circuitry of the pull-down circuit of the present invention.
The present invention provides driving circuitry for commutated inductive loads for use in controlling multi-pole DC brushless motors. In the following description, numerous specific details are set forth such as voltage levels, types of transistors, etc., in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without these specific details. In other instances, well known circuits have not been described in detail so as not to obscure the present invention.
Referring to FIG. 1, an embodiment of the pull-down driver circuit of the present invention is described. A multiplicity of inductive loads, L1, L2, and L3, are to be activated in sequence with a controlled current IL. Typically, the inductive loads are the windings of a brushless DC motor which is commutated (switched) from one winding to the next in sequence to accomplish rotation of the motor. As shown in FIG. 1, input voltage VIN at node 10 is coupled to switch S1A. Switch S1A has three separate conditions where it can be coupled to either line 14A1, 14A2,14A3. Line 14A1 is coupled to the positive input terminal of amplifier A1. Line 14A2 is coupled to the positive terminal of amplifier A2. Line 14A3 is coupled to the positive terminal of amplifier A3. Voltage VF at node 11 is coupled to switch S1B which is connected to three different positions, position 1, 2, or 3. Positions 1, 2 and 3 correspond to lines 16A1, 16A2 and 16A3. Switches S1A and S1B are controlled such that they operate together in the same positions. For example, whenever switch S1A is coupled to line 14A1, switch S1B is connected to line 16A1.
During all times of operation of the circuit, S1A and S1B are both coupled to the same amplifier, either A1, A2, or A3. Line 16A1 is coupled to the inverting input of amplifier A1, line 16A2 is coupled to the inverting input of amplifier A2, and line 16A3 is coupled to the inverting input of amplifier A3. The output of amplifier A1 is coupled to the gate of NMOS transistor M1. Voltage VOUT1 at node 23 is taken from the drain of transistor of M1 and is coupled to inductor L1. Inductor L1 is coupled to node 29, where voltage VM is present.