Data selection device
AssigneeSeiko Epson Corporation
InventorsSachiyuki Abe, Hisao Sato, Hiroaki Nasu, Yasuaki Hagiwara
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Abstract
A data selection device having M+1 stages. Each stage has stored therein prioritized data. Selection of the highest prioritized data available at any instant in time is based on a comparison repeated M times of both the selectability and priority of data available from two different stages of the device. The highest prioritized data is provided at the output of the M+1 stage.
Claims42
A device for selecting data having the highest priority from a plurality of data, comprising:
- a plurality of storage means for storing said plurality of data and arranged in series to define M+1 stages of said storage means, wherein M.gtoreq.1, each storage means of said plurality of storage means being associated with one of the M+1 stages, each stage of said M+1 stages having a stage priority relative to each of the other stages;
- timing means for producing timing signals;
- and
- a plurality of logic circuit means, at least one of said logic circuit means from said plurality of logic circuit means being associated with each of the M+1 stages except for a first of the M+1 stages, each logic circuit means for comparing and selecting between data stored in storage means associated with the same stage as that logic circuit means and data provided from a previous stage of the M+1 stages based on the stage priority of that logic circuit means and the stage priority of the previous stage in response to said timing signals;
- wherein the output from the logic circuit means of the M+1 stage represents data having the highest stage priority.
The device of 6, wherein the detecting means of each odd numbered stage also serves as detecting storage means responsive to the first clock signal for temporary storage of a detecting signal produced by its own stage or the previous stage and wherein the detecting means of each even numbered stage serves as detecting storage means responsive to the second clock signal for temporary storage of a detecting signal produced by its own stage or the previous stage.
A device for selecting selectable data having the highest priority from a plurality of data which is either selectable or nonselectable, comprising:
- a plurality of storage means for storing said plurality of data and arranged in series to define M+1 stages of said storage means, wherein M.gtoreq.1, each storage means of said plurality of storage means having a priority relative to one of the other storage means, at least one of said storage means being associated with each of the M+1 stages which is either selectable or nonselectable;
- a plurality of logic circuit means, at least one of said logic circuit means of said plurality of logic circuit means being associated with one of the M+1 stages except for a first of the M+1 stages;
- and
- timing means for producing clock signals;
- wherein each logic circuit means is operable in responsive to the clock signals for receiving first data stored in storage means associated with the same stage as that logic circuit means and second data transferred from logic circuit means of the previous stage and for selecting the second data when the first and second data are both selectable and for selecting the first data when the second data is nonselectable, and wherein the output from the logic circuit means of the M+1 stage represents selectable data having the highest priority.
A device for selecting selectable data having the highest priority from a plurality of data which is either selectable or nonselectable, comprising:
- a plurality of storage means for storing said plurality of data and arranged in series to define M+1 stages of said storage means, wherein M.gtoreq.1, each storage means of said plurality of storage means having a priority relative to one of the other storage means, at least one of said storage means being associated with each of the M+1 stages;
- a plurality of logic circuit means, at least one of said logic circuit means of said plurality of logic circuit means being associated with one of the M+1 stages except for a first of the M+1 stages;
- and
- timing means for producing clock signals;
- wherein each logic circuit means is operable in responsive to the clock signals for receiving first data stored in storage means associated with the same stage as that logic circuit means and second data transferred from logic circuit means of the previous stage and for selecting the second data when the first and second data are both selectable and for selecting the second data when the first data is nonselectable, and wherein the output from the logic circuit means of the M+1 stage represents selectable data having the highest priority.
Dependencies are inferred from the claim text.