Single element security fusible link
AssigneeNCR Corporation
InventorsWilliam J. Wuertz, Steven K. Stefek, William W. McKinley
Life of this patent
Estimating the term…
Abstract
An I/O circuit including first and second I/O pads, a fuse connected between the first pad and a RAM write enable line, and a diode-connected transistor connected between the RAM write enable line and second pad. Data is written to the RAM by applying a voltage potential to the pads after which the fuse is blown by increasing the potential difference. Other forms of the invention include a resistor connected between the RAM write enable line and ground, and I/O lines connected between the pads, respectively, and a logic circuit.
Claims11
A method of using an I/O pad of an integrated circuit chip, with the I/O pad being connected to a logic circuit, and further with the integrated circuit chip having a memory connected to a write enable line, comprising the steps of:
- connecting a fuse between the I/O pad and the write enable line;
- applying a first voltage potential to the I/O pad so as to access the write enable line and allow data to be written to the memory;
- applying a second voltage potential to the I/O pad so as to blow the fuse and prevent access to the write enable line;
- and
- accessing the logic circuit through the I/O pad.
A method of using an I/O pad of an integrated circuit chip having a memory and a logic circuit, comprising the steps of:
- connecting a fuse between the I/O pad and a write enable line of the memory;
- accessing the write enable line through the I/O pad so as to allow data to be stored in the memory;
- applying a voltage potential to the I/O pad so as to blow the fuse and prevent further access to the write enable line;
- and
- accessing an I/O line of the logic circuit through the I/O pad so as to access the logic circuit.
A method of using an I/O pad of an integrated circuit chip, with the I/O pad being connected to a logic circuit, and with the integrated circuit chip having a memory connected to a write enable line, and further with a fuse being connected between the I/O pad and the write enable line, comprising the steps of:
- applying a first voltage potential to the I/O pad so as to access the write enable line and allow data to be written to the memory;
- applying a second voltage potential to the I/O pad so as to blow the fuse and prevent access to the write enable line;
- and
- accessing the logic circuit through the I/O pad.
Dependencies are inferred from the claim text.