Semiconductor IC device using ferroelectric material in data storage cells with light assisted state transition

A photosensitive non-volatile semiconductor memory device comprising:

• a semiconductor substrate;
• a non-volatile memory cell array including a plurality of photosensitive memory cells arranged in rows and columns, each of said memory cells having a switching transistor element and a capacitor element connected in series with said transistor element, said switching transistor element having a control electrode layer and first and second main electrode regions formed in said substrate between which electric current is allowed to flow when said switching transistor element is conductive, said gate electrode layer being formed over said semiconductor substrate between said first and second main electrode regions, said capacitor element having first and second electrode layers and a ferroelectric material layer sandwiched therebetween, said capacitor element being formed over said control electrode layer of said transistor element and insulated therefrom and having its first electrode electrically connected with said second main electrode region of said transistor element, said ferroelectric material layer exhibiting a polarization varied in response to a voltage applied across said first and second electrode of said capacitor element and light emitted to said ferroelectric material layer in which a direction of polarization is reversed when a sum of energy of said emitted light and said applied voltage is varied to reach a polarization reversal level of energy;
• a plurality of first conductors each connected in common with first main electrode regions of transistor elements of those memory cells which are on one column of the memory cell array;
• a plurality of second conductors each connected in common with control electrode layers of transistor elements of those memory cells which are on one row of the memory cell array;
• a plurality of third conductors each connected in common with second electrode layers of capacitor elements of those memory cells which are on one row of the memory cell array;
• means for generating first selection voltage signals to be applied to said first conductors and means for generating second selection voltage signals to be applied to said second conductors;
• and
• means for generating control voltage signals to be applied to said third conductors, said first selection voltage signals and control voltage signals, when information is written in said memory device, having values such that said ferroelectric material layers of said memory cells are not subjected to a voltage which by itself causes reversal of polarization without any optical input to said memory cells.

A photosensitive non-volatile semiconductor IC device comprising:

• a memory cell array formed in a substrate, in which a plurality of non-volatile memory cells are arranged in a predetermined manner, in each of which a ferroelectric material layer is disposed between a gate insulating layer and a gate electrode layer of a field effect transistor, the polarization direction of which ferroelectric material varies, tracing a hysteresis loop, depending on a voltage applied thereto and light emitted thereonto;
• means for polarizing the ferroelectric material layers in said plurality of memory cells in said memory cell array in a first direction by applying a preparation voltage higher than a polarization reversal voltage in the hysteresis loop of said ferroelectric material layer between said gate electrode layers and the substrate;
• means for activating the ferroelectric material layer of each of said memory cells toward a second direction opposite to said first direction in the hysteresis loop by applying a write voltage between said gate electrode layer and said substrate, said write voltage having an amplitude smaller than that of the polarization reversal voltage which would be necessary to invert the polarization material to the second direction;
• and
• means for inverting the polarization direction of the ferroelectric layers of predetermined memory cells in said memory cell array to said second direction by irradiating said ferroelectric material layers of said predetermined memory cells to exceed the polarization reversal voltage with light.

A photosensitive non-volatile semiconductor memory device comprising:

• a semiconductor substrate;
• a non-volatile memory cell array including a plurality of photosensitive memory cells arranged in rows and columns, each of said memory cells having a transistor structure element having a control electrode layer, a ferroelectric material layer underlying said control electrode layer and first and second main electrode regions formed in said substrate between which electric current is allowed to flow when said transistor structure element is conductive, said gate electrode layer and said ferroelectric material layer being formed over and electrically insulated from said semiconductor substrate between said first and second main electrode regions, said ferroelectric material layer exhibiting a polarization varied in response to a voltage applied thereto and light emitted thereonto in which a direction of polarization is reversed when a sum of energy of said emitted light and said applied voltage is varied to reach a polarization reversal level of energy;
• a plurality of first conductors each connected in common with first main electrode regions of transistor structure elements of those memory cells which are on one column of the memory cell array;
• a plurality of second conductors each connected in common with control electrode layers of transistor structure elements of those memory cells which are on one of the memory cell array;
• a common electrode layer connected in common with the second main electrode region of the transistor structure element of each of said memory cells;
• means for generating first selection voltage signals to be applied to said first conductors and means for generating second selection voltage signals to be applied to said second conductors;
• and
• means for generating control voltage signals to be applied to said common electrode layer, said second selection voltage signals and control voltage signals, when information is written in said memory device, having values such that said ferroelectric material layers of said memory cells are not subjected to a voltage which by itself causes reversal of polarization without any optical input to said memory cells.