Differential sense amplifier with cross connected reference circuits

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively latching said first and second output signals.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively equilibrating said first and second input terminals, wherein a common potential is applied to said first and second input terminals when said means for selectively equilibrating is selected.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively equalizing said first and second output terminals, wherein a common potential is applied to said first and second output terminals when said means for selectively equalizing is selected.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively equalizing said first and second output terminals that includes means for substantially connecting said first output terminal to said first reference node, and said second output terminal to said second reference node, wherein a common potential is applied to said first and second output terminals and said first and second reference nodes when said means for selectively equalizing is selected.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively equalizing said first output terminal and said second output terminal that includes means for substantially connecting said first reference node to said second reference node, wherein a common potential is applied to said first and second reference nodes when said means for selectively equalizing is selected.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for use in causing said first reference signal to be different than said second reference signal to increase the gain of the differential sense amplifier;
• and
• means for selectively equalizing said first output terminal and said second output terminal, that includes means for connecting said first output terminal, said first reference node, said second output terminal, and said second reference node, wherein as common potential is applied to said first output terminal, said first reference node, said second output terminal, and said second reference node when said means for selectively equalizing is selected.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first reference branch that includes a first pair of reference field-effect transistors (FETs), a one of a first type and an other of a second type, each of said first pair of reference FETs includes a first reference FET gate terminal, a first reference FET drain terminal, and a first reference FET source terminal, wherein said first reference FET drain terminal of said one of said first pair of reference FETs is operatively connected, by a first connection of said first reference branch, to said first reference drain terminal of said other of said first pair of reference FETs and, by a second connection of said first reference branch, to both of said first reference FET gate terminals, and the source terminal of said other of said first pair of reference FETs is operatively connected to a first reference potential;
• a first amplifier branch that includes a first pair of amplifier FETs, a one of said first type and an other of said second type, each of said first pair of amplifier FETs includes a first amplifier FET gate terminal, a first amplifier FET drain terminal, and a first amplifier FET source terminal, wherein said first amplifier source terminal of said one of said first pair of amplifier FETs is operatively connected to a first input terminal for receiving the first input signal, said first amplifier drain terminal of said one of said first pair of amplifier FETs is operatively connected to said first amplifier drain terminal of said other of said first pair of amplifier FETs to define a first output terminal for providing the first output signal, said first amplifier source terminal of said other of said first pair of amplifier FETs is operatively connected to said first reference potential, said first amplifier FET gate terminal of said one of said first pair of amplifier FETs is operatively connected to said first reference FET gate terminal of said one of said first pair of reference FETs, and said first amplifier FET gate terminal of said other of said first pair of amplifier FETs is operatively connected to said first reference FET gate terminal of said other of said first pair of reference FETs;
• a second reference branch that includes a second pair of reference FETs, a one of said first type and an other of said second type, each of said second pair of reference FETs includes a second reference FET gate terminal, a second reference FET drain terminal, and a second reference FET source terminal, wherein said second reference FET drain terminal of said one of said second pair of reference FETs is operatively connected, by a first connection of said second reference branch, to said second reference FET drain terminal of said other of said second pair of reference FETs and, by a second connection of said second reference branch, to both of said second reference FET gate terminals, and the source terminal of said other of said second pair of reference FETs is operatively connected to said first reference potential;
• and
• a second amplifier branch that includes a second pair of amplifier FETs, a one of said first type and an other of said second type, each of said second pair of amplifier FETs includes a second amplifier FET gate terminal, a second amplifier FET drain terminal, and a second amplifier FET source terminal, wherein said second amplifier source terminal of said one of said second pair of amplifier FETs is operatively connected to a second input terminal for receiving the second input signal, said second amplifier drain terminal of said one of said second pair of amplifier FETs is operatively connected to said second amplifier drain terminal of said other of said second pair of amplifier FETs to define a second output terminal for providing the second output signal, said second amplifier source terminal of said other of said second pair of amplifier FETs is operatively connected to said first reference potential, said second amplifier FET gate terminal of said one of said second pair of amplifier FETs is operatively connected to said second reference FET gate terminal of said one of said second pair of reference FETs, and said second amplifier FET gate terminal of said other of said second pair of amplifier FETs is operatively connected to said second reference FET gate terminal of said other of said second pair of reference FETs;
• wherein said first reference FET source terminal of said one of said first pair of reference FETs is operatively connected to said second input terminal and said second reference FET source terminal of said one of said second pair of reference FETs is operatively connected to said first input terminal.

A differential sense amplifier receptive of a differential input signal that is defined by a first input signal and a second input signal which is different than the first input signal, and for supplying an amplified differential output signal that is defined by a first output signal and a second output signal which is different than the first output signal, comprising:

• a first amplifying portion that includes a first input terminal for receiving the first input signal, a first reference branch for providing a first reference signal at a first reference node, a first amplifying branch that uses said first reference signal in amplifying the first input signal to produce the first output signal, and a first output terminal for outputting the first output signal provided by said first amplifying branch;
• a second amplifying portion that includes a second input terminal for receiving the second input signal, a second reference branch for providing a second reference signal at a second reference node, a second amplifying branch that uses said second reference signal in amplifying the second input signal to produce the second output signal, and a second output terminal for outputting the second output signal provided by said second amplifying branch;
• means for selectively latching the first and second output signals;
• means for selectively disabling said first and second amplifying portions to prevent said first and second amplifying portions from conducting current from a power supply;
• means for selectively equilibrating said first and second input terminals, wherein a common potential is applied to said first and second input terminals when said means for selectively equilibrating is selected;
• means for selectively equalizing said first and second output terminals that includes means for connecting said first output terminal, said first reference node, said second output terminal, and said second reference node, wherein a common potential is applied to said first output terminal, said first reference node, said second output terminal, and said second reference node when said means for selectively equalizing is selected;
• and
• means for use in providing the first input signal to said second reference branch and the second input signal to said first reference branch, wherein said first reference signal produced by said first reference branch at said first reference node changes in magnitude oppositely to a change in the first input signal applied to said first amplifying branch and said second reference signal produced by said second reference branch at said second reference node changes in magnitude oppositely to a change in the second input signal applied to said second amplifying branch to increase the gain from each of said first and second amplifying branches.