Compound logic circuit having NAND and NOR gate outputs and two transistors connected within both gate circuits
AssigneeSharp Kabushiki Kaisha
InventorShunichi Murahashi
Life of this patent
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Abstract
A compound logic circuit including one NAND gate constituted by two p-channel transistors and two n-channel transistors and one NOR gate constituted by two p-channel transistors and two n-channel transistors. The compound logic circuit is characterized by one of the two p-channel transistors contained in the NAND gate being used as one of the two p-channel transistors contained in the NOR gate and one of the two n-channel transistors contained in the NAND gate being used as one of the two n-channel transistors contained in the NOR gate.
Claims16
A compound logic circuit comprising:
- a NAND gate and a NOR gate, wherein said NAND gate includes:
- a first p-channel transistor having one terminal connected to a first electric potential, a gate connected to a first input terminal of said compound logic circuit, and the other terminal connected to a first output terminal of said compound logic circuit;
- a first n-channel transistor having one terminal connected to said first output terminal, a gate connected to said first input terminal, and the other terminal connected to a second output terminal of said compound logic circuit;
- a second n-channel transistor having one terminal connected to said second output terminal, a gate connected to a second input terminal of said compound logic circuit and the other terminal connected to a second electric potential;
- and
- a second p-channel transistor having one terminal connected to said first electric potential, a gate connected to said second input terminal, and the other terminal connected to said first output terminal, and
- said NOR gate includes:
- said second p-channel transistor;
- said second n-channel transistor;
- a third p-channel transistor having one terminal connected to said first output terminal, a gate connected to a third input terminal of said compound logic circuit, and the other terminal connected to said second output terminal;
- and
- a third n-channel transistor having one terminal connected to said second output terminal, a gate connected to said third input terminal, and the other terminal connected to said second electric potential.
A single integrated chip compound logic circuit performing logic NOR and NAND operations, comprising:
- three input terminals for receiving input signals and two output terminals for generating logically operated signals and
- at most six transistors connected to the three input and two output terminals,
- two of the transistors being connected as a part of a NOR gate to perform the logic NOR operations on input signals received at a first pair of the three input terminals and as a part of a NAND gate to perform the logic NAND operation on input signals received at a second, different pair of the three input terminals,
- wherein the input signals received at both the NOR and NAND gates have the same logic polarity type.
A single integrated chip compound logic circuit for performing logic NOR and NAND operations, comprising:
- three input and two output terminals and a power supply terminal;
- at most three N-channel transistors and at most three P-channel transistors connected to the three input and two output terminals and to the power supply terminal;
- a NAND gate formed from a first group of two of the N-channel transistors and a first group of two of the P-channel transistors connected to perform a NAND operation on input signals received at a first pair of the three input terminals and to generate an output signal on one of the output terminals;
- and
- a NOR gate formed from a second group of two of the N-channel transistors and a second group of two of the P-channel transistors connected to perform a NOR operation on input signals received at a second, different pair of the three input terminals and to generate an output signal on the other of the output terminals,
- wherein the input signals received at the input terminal of both the NAND gate and the NOR gate have the same logic polarity type.
Dependencies are inferred from the claim text.