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AssigneeInternational Business Machines Corporation
InventorsLawrence D. Curley, Matthew J. Mitchell, Jr.
Estimating the term…
A power-on reset circuit is used to initialize a system component upon power-on. The circuit comprises a digital circuit such as a shift register which exhibits a multiplicity of uncertain or random outputs upon power-on. These output are coupled to digital logic such as an AND gate which itself outputs a power-on reset signal when any of the outputs of the shift register is not a predetermined output level. Because the outputs of the shift register are uncertain or arbitrary upon power-on and there are a multiplicity of such outputs, it is not likely that all of the outputs of the shift register will coincidentally exhibit the predetermined levels upon power-on. Consequently, it is very likely that the AND gate will provide the power-on reset signal upon power-on to initialize the system component. Subsequently, when the system is ready for normal operation, the shift register is set with the predetermined levels to terminate the power-on reset signal and thereby enable or condition the system component for normal operation.
A circuit for generating a power-on reset signal to initialize a system component upon power-on, said circuit comprising:
A circuit for generating a power-on reset signal to initialize a system component to a safe state between a power-on time and a beginning of normal operation of said system component, said circuit comprising:
A circuit for generating a power-on reset signal to initialize a system component to a predetermined state between a power-on time and a beginning of normal operation of said system component, said circuit comprising:
Dependencies are inferred from the claim text.