Semiconductor bond pad structure and method
AssigneeSGS-Thomson Microelectronics S.A.
InventorsFrank R. Bryant, Fusen E. Chen
Life of this patent
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Abstract
A method for forming an improved bonding pad structure. A bond pad structure is formed by depositing a barrier layer over an underlying region of a semiconductor device, and then depositing a first conductive layer over the barrier layer. The barrier layer and conductive layer are then patterned and etched to define a conductive region. In a preferred embodiment, the conductive region is formed in the shape of a grid. A second conductive layer is deposited over the conductive region and a portion of the exposed underlying region. The second conductive layer makes a good adhesive contact with the underlying region, thus preventing bond pad lift off.
Claims12
A bond pad structure in an integrated circuit, comprising:
- a semiconductor device having an underlying region;
- at least one barrier layer deposited over the underlying region, wherein a portion of the underlying region is exposed;
- a first conductive layer deposited over the at least one barrier layer to form a conductive region, wherein the exposed portion of the underlying region remains exposed;
- and
- a second conductive layer deposited over the first conductive layer and the exposed portion of the underlying region.
A bond pad structure in an integrated circuit, comprising:
- a semiconductor device having an underlying region, wherein the underlying region is oxide;
- a conductive region deposited over the semiconductor device;
- and
- at least one barrier region, wherein a portion of the conductive region is in direct contact with the underlying region and a portion of the conductive region is not in direct contact with the underlying region, further wherein the portion of the conductive region not in direct contact with the underlying region is separated from the underlying region by the barrier region.
A bond pad structure in an integrated circuit, comprising:
- a semiconductor device having an underlying region;
- a conductive region deposited over the semiconductor device;
- and
- at least one barrier region, wherein a portion of the conductive region is in direct contact with the underlying region and a portion of the conductive region is not in direct contact with the underlying region, further wherein the portion of the conductive region not in direct contact with the underlying region is separated from the underlying region by the barrier region, wherein the barrier layer is titanium nitride.
Dependencies are inferred from the claim text.