Coherent demodulating device with carrier wave recovering digital circuit

A coherent demodulating device in a receiver receiving a modulated signal obtained by multi-symbol modulation of two quadrature modulation carrier waves, said coherent demodulating device comprising

• demodulating means supplying quadrature demodulation carrier waves for demodulating said modulated signal into two demodulated analog component signals, said quadrature demodulation carrier waves having a frequency belonging to a frequential uncertainty range of said modulation carrier waves,
• sampling means operating at a symbol clock frequency of said modulated signal for converting said two demodulated analog component signals into two incoming digital signals forming coupled of samples,
• digital phase shifting means for phase shifting said two incoming signals by a digital demodulation phase into two outgoing digital signals,
• digital phase comparing means for receiving said two outgoing digital signals and for producing, at said symbol clock frequency, first and second error signal pulses, respectively, corresponding to negative and positive phase differences between said demodulation carrier waves and said modulation carrier waves,
• digital frequency comparing means receiving said two outgoing digital signals for producing, at said symbol clock frequency, third and fourth error signal pulses, respectively, corresponding to positive and negative frequency differences between said demodulation carrier waves and said modulation carrier waves,
• state detecting means for supplying detection pulses responsive t amplitudes of said outgoing digital signals lying in respective predetermined amplitude intervals during each period of said symbol clock frequency, thereby deriving a logic control signal,
• switching means responsive to said logic control signal for activating said frequency comparing means and deactivating said phase comparing means when a count of said detection pulses cumulated during a period multiple of said symbol clock period is greater than a first predetermined threshold, and for deactivating said frequency comparing means and activating said phase comparing means when said count of said detection pulses cumulated during said multiple period is less than said first threshold, and
• digital processing means for calculating said digital demodulation phase as a function of said error signal pulses produced by one of said digital phase comparing means and digital frequency comparing means which is activated, so as to a posteriori compensate for phase and frequency differences between said modulation carrier waves and said demodulation carrier waves by phase shifting said two incoming signals.