System for communicating with external device registers via two-byte data packets over a serial bus

In a system of the type including a microprocessor and a device external to said processor, wherein said device has a multiple-bit address and includes a plurality of registers for storing bits of data wherein each said register has a unique multiple-bit address, and wherein said microprocessor is coupled to said external device by a serial bus, a communication system, permitting said microprocessor access to said registers, said system comprising:

• message generator means within said microprocessor for generating a register access message comprising first and second multiple-bit bytes, said first byte including a first number of bits containing said multiple-bit address of said external device and a second number of bits identifying said message as a register access message, and said second byte including a single bit identifying said message as a register read or register write message and a third plurality of bits defining the multiple-bit address of the register being accessed;
• transmitting means coupled to said microprocessor for transmitting said first and second multiple-bit bytes in series over said serial bus;
• receiving means within said external device and coupled to said serial bus for receiving said register access message;
• register access means within said external device coupled between said receiving means and said registers for decoding said third plurality of bits and providing an access signal to said accessed register corresponding to the multiple-bit register address defined by said plurality of bits and for receiving or changing contents of said accessed register depending upon status of said single bit in said second byte;
• and
• message generator means within said external device for generating a read response message including said first byte when said register access message is a register read message.