Method and apparatus for clock recovery for digitally implemented modem
AssigneeComsat Corporation
InventorsAjit Shenoy, Lin-nan Lee, Michael K. Eng
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Abstract
The correct sampling timing phase is obtained by a digital data receiver by averaging samples of the preamble of a received data burst and using the computed averages as addresses to a memory which stores correction values for the timing phase. The output of the memory is sent to a phase correction circuit for correcting the phase of the presently received data burst.
Claims11
A method for obtaining a correct sampling timing phase in a digital burst communications receiver during a time when a synchronization preamble section of a data burst transmitted to said receiver is being processed, said processing including the step of sampling said preamble in accordance with said sampling timing phase, said method including steps of:
- (a) averaging samples of said preamble section of said data burst;
- (b) using the results of said step (a) as an address to a memory which stores correction values;
- (c) outputting from said memory an appropriate correction value corresponding to a presently received sampling timing phase in accordance with said address;
- and
- (d) using said appropriate correction value from said step (c) to alter the phase of the presently received sampling timing phase so as to correct the presently received sampling timing phase to the correct sampling timing phase.
An apparatus for obtaining a correct sampling timing phase in a digital burst communications receiver during a time when a synchronization preamble section of a data burst transmitted to said receiver is being processed, said apparatus including means for sampling said preamble section in accordance with a present sampling timing phase, said apparatus comprising:
- averaging means for averaging samples of said preamble section;
- memory means for storing correction values, said memory means receiving, as an address, results from said averaging means;
- and
- sampling timing phase correction means for correcting said presently received sampling timing phase to said correct sampling timing phase in accordance with an output from said memory means.
A method for obtaining a correct sampling timing phase in a digital burst communications receiver during a time when a synchronization preamble section of a data burst transmitted to said receiver is being processed, including steps of:
- (a) sampling said preamble section of said data burst in accordance with a presently received sampling timing phase;
- (b) averaging samples of said preamble section of said data burst;
- and
- (c) using the results of said step (b) to correct a presently received sampling timing phase to said correct sampling timing phase.
A method for obtaining a correct sampling timing phase in a digital burst communications receiver during a time when a synchronization preamble section of a data burst transmitted to said receiver is being processed, said processing including the step of sampling said preamble in accordance with said sampling timing phase, said method including steps of:
- (a) obtaining samples of said preamble section of said data burst;
- (b) using the results of said step (a) as an address to a memory which stores correction values;
- (c) outputting from said memory an appropriate correction value corresponding to a presently received sampling timing phase in accordance with said address;
- and
- (d) using said appropriate correction value from said step (c) to alter the phase of the presently received sampling timing phase so as to correct the presently received sampling timing phase to the correct sampling timing phase.
Dependencies are inferred from the claim text.