Electrically erasable and programmable semiconductor memory device

An electrically erasable and programmable memory device comprising:

• a memory cell array comprising a plurality of blocks, each comprising electrically erasable and programmable memory cells;
• data input/output means, coupled to said memory cell array, for transferring data between the memory cell array and an external device;
• and
• address conversion means, coupled to said memory cell array, for converting an external address signal into a decoded signal applied to the memory cell array so that a correspondence between the external address and the plurality of blocks is changed so as to equally access the plurality of blocks for programming,
• the number of the plurality of blocks being greater than the number of blocks accessible by the external address signal.