Memory having ferroelectric capacitors polarized in nonvolatile mode

A semiconductor memory comprising:

• a ferroelectric capacitor having a predetermined capacitance;
• voltage output means for outputting a first voltage for charging said ferroelectric capacitor so as to change a polarization direction thereof and a second voltage for charging said ferroelectric capacitor without changing the polarization direction thereof, regardless of data stored in said ferroelectric capacitor;
• reference capacitor;
• a sense amplifier connected to said ferroelectric capacitor and said reference capacitor;
• and
• charge control means for controlling a charge to be applied to said reference capacitor so that said reference capacitor accumulates less charge than a charge which said ferroelectric capacitor accumulates, when the second voltage is applied to said ferroelectric capacitor, and said reference capacitor accumulates greater charge than the charge applied to said ferroelectric capacitor when said ferroelectric capacitor is forwardly polarized, and less charge than a charge applied to said ferroelectric capacitor when said ferroelectric capacitor is reversely polarized by said first voltage.

A semiconductor memory comprising:

• a pair of ferroelectric capacitors having substantially the same characteristics,
• means for complementarily charging different amounts of charges to said ferroelectric capacitors;
• means for complementarily changing polarization directions of said ferroelectric capacitors;
• and
• means for selectively executing volatile operation mode in which data is determined from an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined from directions in which said ferroelectric capacitors are polarized.

A semiconductor memory comprising:

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized, including data-determining means for comparing the charge flowing to said reference capacitor when a voltage is applied to said reference capacitor, with the charge flowing to said ferroelectric capacitor when a voltage is applied to said ferroelectric capacitor while said ferroelectric capacitor is storing data, thereby to determine the data stored in said ferroelectric capacitor.

A semiconductor memory comprising;

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized;
• wherein said reference capacitor has a capacitance which is smaller than the capacitance which said ferroelectric capacitor has while said operation mode executing means is performing the volatile operation, and said operation mode executing means includes data-determining means or comparing the charges accumulated in said ferroelectric capacitor when a voltage is applied thereto, with the charge accumulated in said reference capacitor when the same voltage is applied to said reference capacitor, thereby to determine the data stored in said ferroelectric capacitor.

A semiconductor memory comprising;

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized;
• wherein said reference capacitor has such a capacitance that said reference capacitor accumulates an electric charge less than an electric charge accumulated in said ferroelectric capacitor, when a voltage is applied to said reference capacitor while said operation mode executing means is executing the volatile operation mode, and said operation mode executing means includes data-determining means for comparing the charge accumulated in said reference capacitor when said voltage is applied to said reference capacitor, with the charge accumulated in said ferroelectric capacitor when a voltage is applied to said ferroelectric capacitor, thereby to determine the data stored in said ferroelectric capacitor.

A semiconductor memory comprising:

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized;
• wherein said operation mode executing means includes data-determining means for comparing the charge accumulated in said reference capacitor, which is greater than the charge flowing to said ferroelectric capacitor when said ferroelectric capacitor is forwardly polarized, and is less than the charge flowing to said ferroelectric capacitor when said ferroelectric capacitor is reversely polarized, with the charge flowing to said ferroelectric capacitor when said ferroelectric capacitor is polarized, thereby to determine the data stored in said ferroelectric capacitor.

A semiconductor memory comprising;

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized;
• wherein said reference capacitor is used when said operation mode executing means executes the volatile operation mode and the volatile operation mode, and said executing means includes means for changing the voltage applied to said reference capacitor.

A semiconductor memory comprising:

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized wherein said executing means executes the volatile operation mode under normal condition, and executes the nonvolatile operation mode under a special condition.

A semiconductor memory comprising:

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized wherein said executing means includes means for stopping the volatile operation mode and starting the nonvolatile operation mode when supply of power to the memory is stopped, and for storing the last data valid during the execution of the volatile operation mode, by means of the nonvolatile operation mode.

A semiconductor memory comprising:

• at least one ferroelectric capacitor;
• a reference capacitor;
• and
• operation mode executing means for selectively performing volatile operation mode in which data is determined by an amount of electric charges in said ferroelectric capacitors, and nonvolatile operation mode in which data is determined by directions in which said ferroelectric capacitors are polarized wherein said executing means includes means for reading data during the execution of the nonvolatile operation mode, when supply of power to the memory is started, and starting the volatile operation mode thereafter.

A semiconductor memory comprising;

• a plurality of memory cells each comprising a ferroelectric capacitor having a first electrode and a second electrode;
• potential-applying means for applying a first potential to the first electrode of the ferroelectric capacitor of each memory cell, thereby to write a bit of a first binary value to the memory cell, and a second potential to the first electrode of the ferroelectric capacitor of the memory cell, thereby to write a bit of a second binary value to the memory cell;
• holding means for holding said second electrode of the ferroelectric capacitor of each memory cell at a potential higher than the first potential and lower than the second potential;
• and
• detecting means for detecting a direction in which said ferroelectric capacitor is polarized, thereby to read a bit from said memory cell.

A semiconductor memory comprising:

• a plurality of memory cells each comprising a ferroelectric capacitor having a first electrode and a second electrode, and a switching transistor connected to the first electrode of the ferroelectric capacitor;
• potential-applying means for applying a first potential to the first electrode of the ferroelectric capacitor of each memory cell through said switching transistor, thereby to write a bit of a first binary value to the memory cell, and a second potential to the first electrode of the ferroelectric capacitor of the memory cell through said switching transistor, thereby to write a bit of a second binary value to the memory cell;
• holding means for holding said second electrode of the ferroelectric capacitor of each memory cell at a third potential higher than the first potential and lower than the second potential;
• and
• detecting means for detecting the direction in which said ferroelectric capacitor is polarized, thereby to read a bit from said memory cell.