Global interconnect architecture for optical computer

An optical computer for operating upon data vectors in accordance with instructions specified by a user, wherein each of the input data vectors have a predetermined plurality of binary bits and the specified instructions include instructions which are implementable by forming combinatorial functionals and combinatorial summations of binary bits selected from the data vectors, from previously formed combinatorial functionals, and from previously formed combinatorial summations, the optical computer comprising:

• means responsive to binary bits of the input data vectors where the means has a plurality of elements, and each element is responsive to a corresponding one of the binary bits of the input data vectors and provides an optical signal representative of the corresponding binary bit along one of a first plurality of signal paths;
• a first control plane means positioned in the optical path of the first plurality of paths, the first control plane means having a plurality of elements with each element having a binary control plane state value, where the elements are responsive to the optical signals projected along the first plurality of signal paths, and where the elements of the first control plane means include;
• a first means for optically ANDing binary bits of the element's control plane state value with the optical signal projected along the first plurality of signal paths, and means for broadcasting an optical signal representative of the result of the optical AND along a selected plurality of a second plurality of signal paths;
• a first binary detector means positioned in the optical path of the second plurality of signal paths, the detector means having a plurality of elements where the elements are responsive to the optical signals broadcast along the second plurality of signal paths, and where the elements include means for optically ORing the optical signal representative of the results of the first optical ANDing means, wherein the elements of the first binary detector means include;
• means for optically detecting the signals representative of the result of the first optical ANDing means;
• means for electronically amplifying the detected signals representative of the result of the first optical ANDing means;
• means for electronically performing a logical negation of the amplified signals thereby forming a combinatorial functional data vector;
• and
• means for optically emitting signals representative of the results of the logical negation means along a third plurality of signal paths;
• a second control plane placed in the optical path of the third plurality of signal paths, the second control plane means having a plurality of elements with each element having a binary control plane state value, where the elements are responsive to the optical signals emitted along the third plurality of signal paths, and where the elements of the second control plane means include;
• a second means for optically ANDing binary bits of the element's control plane state value with the optical signal emitted along the third plurality of signal paths, and means for broadcasting an optical signal representative of the result of the optical AND along a selected plurality of a fourth plurality of signal paths;
• a second binary detector means positioned in the optical path of the fourth plurality of signal paths, the detector means having a plurality of elements where the elements are responsive to the optical signals broadcast along the fourth plurality of signal paths, and where the elements include means for optically ORing the optical signal representative of the results of the second optical ANDing means, wherein the elements of the second binary detector means include;
• means for optically detecting the signals representative of the result of the second optical ANDing means, thereby detecting the formation of a combinatorial summation data vector;
• means for electronically amplifying the detected signals representative of the result of the second optical ANDing means;
• and
• means for optically emitting signals representative of the results of the amplification means along a fifth plurality of signal paths, whereby the optical signals represent the user specified instruction;
• and
• means for evaluating the user specified instruction and identifying control vectors which when applied to the first control plane means form the combinatorial functionals as the output signal of the first binary detector means, and when applied to the second control plane means form the combinatorial summations as the output signal of the second binary detector means, and for supplying the identified functional and summation control vectors to the first and second control plane means so that the combinatorial functionals are formed as the output signal of the first binary detector means, and the combinatorial summations are formed as the output signal of the second binary detector means, whereby the user specified instruction is implemented.

A device for routing an optical signal received at an input to one of a plurality of outputs specified by an address vector, wherein the address data vector has a predetermined plurality of binary bits in dual rail format, the optical signal routing device comprising:

• a plurality of detector elements each of which provides one of the outputs of the device and each of which is positioned at a different predetermined detect location, wherein each detector element detects the presence or absence of light at its predetermined detect location;
• means for providing a plurality of optical address signals, wherein each optical address signal is an optical representation of one of the dual rail binary bits of the address vector;
• means for broadcasting the input optical signal to each of the detect locations;
• and
• a plurality of control elements, each of which is associated with a different one of the plurality of optical address signals, and each of which routes its associated optical address signal to predetermined selected ones of the detect locations;
• wherein the routing by each control element of its associated optical address signal to selected detect locations is chosen so that, for each unique combination of binary bits of the address vector, only one of the detector elements receives no light from the plurality of control elements, while all other detector elements are illuminated by light from the plurality of control elements;
• whereby the detector element which receives no light is the only detector which is responsive to the input optical signal so as to provide an output which is representative of the input optical signal.

A device for detecting, amplifying, negating, and emitting signals, the device combining electronic and optical means and comprising:

• means for optically detecting signals;
• semiconductor based means for electronically amplifying the detected signals;
• semiconductor based means for electronically performing a selectable logical negation of the amplified signals;
• and
• means for optically emitting signals representative of the results of the logical negation means along a plurality of signal paths.

A method of operating an optoelectronic detection stage having a capability of a fan-in of N, where N is greater than 8, and having a optical output at a predetermined optical power level, P, wherein the stage includes a laser output stage which provides the power level, P, in response to a drive signal of level, D, at an operating power level, OP, the method comprising the steps of:

• (a) receiving optical input signals having an ON state on the order of 100 to 10,000 photons per event, and a contrast ratio relative to an OFF state of the optical input signals of at least 100 to 1;
• (b) converting the optical input signals into electrical form using a converting device having low noise and having a power consumption level, in the presence of N optical input signals all of which are in an ON state, which is less than the operating power level, OP, of the laser output stage;
• and
• (c) amplifying the converted optical input signals so that, when at least one of optical input signals incident upon the converting device is in an ON state, a drive signal is provided to the laser output stage which has a magnitude equal to the drive level for the laser output stage.