CMOS circuit with crowbar limiting function
AssigneesSharp Microelectronics Technology, Inc., Sharp Kabushiki Kaisha
InventorYoshifumi Masaki
Life of this patent
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Abstract
Crowbar current in a CMOS amplifier circuit is limited during a transition state where one transistor is being turned on and another transistor is being turned off. The transistor that is being turned off is caused to pass through a midpoint state before the transistor that is being turned on is allowed to transition through a similar midpoint state. In one embodiment, independent gate voltages are applied to the P and N transistors of a CMOS amplifier. The gate voltages are independently controlled prior to passage through a midpoint level and then converge towards one another after passage through the midpoint state.
Claims20
A crowbar-limited CMOS circuit comprising:
- a signal input node for receiving an input signal, said input signal switching between predefined low and high input levels;
- a transition control node for receiving a reconvergence control signal, said reconvergence control signal switching between opposed first and second states;
- a N-type first transistor having respective first gate, source and drain terminals;
- a P-type second transistor having respective second gate, source and drain terminals, where the second drain is coupled to the first drain, the first source is coupled to a first power rail, and the second source is coupled to a second power rail, thereby defining a series current path from the second power rail, through the first and second transistors, to the first power rail;
- first gate voltage supply means for supplying a first gate voltage to the first gate terminal;
- and
- second gate voltage supply means for supplying a second gate voltage to the second gate terminal;
- wherein the first and second gate voltage supply means are operatively coupled to the signal input node and responsive to transitions of the input signal between said low and high input levels;
- wherein the first and second gate voltage supply means are further operatively coupled to the transition control node and responsive to the reconvergence control signal;
- wherein the first and second gate supply means are interoperatively coupled such that, for a first state of the reconvergence control signal, one gate supply means keeps its corresponding transistor turned off while the other gate supply means starts to turn its corresponding transistor off in response to the input signal transitioning to one or the other of the low and high levels;
- and
- wherein the first and second gate supply means are further interoperatively coupled such that, in response to a transition of the reconvergence control signal from the first state to the opposed second state, the one gate supply means begins to turn on its corresponding transistor as the other gate supply means completes the turning off of its corresponding transistor in further response to the input signal transitioning to said one or the other of the low and high levels.
A crowbar-limited CMOS circuit comprising:
- a P-type first transistor having respective first gate, source and drain terminals;
- a N-type second transistor having respective second gate, source and drain terminals, where the second drain is coupled to the first drain, the first source is coupled to a first power rail, and the second source is coupled to a second power rail, thereby defining a series current path from the first power rail, through the first and second transistors, to the second power rail;
- first gate voltage supply means for supplying a first gate voltage to the first gate terminal;
- and
- second gate voltage supply means for supplying a second gate voltage to the second gate terminal;
- where the first and second gate supply means are interoperatively coupled such that one turns its corresponding transistor on while the other turns its corresponding transistor off;
- and
- wherein the first and second gate supply means are further interoperatively coupled such that the gate voltage of the transistor that is being turned off crosses through a predefined first midpoint level before the gate voltage of the transistor that is being turned on crosses through a similar second midpoint level;
- said crowbar limited circuit further comprising a common input line coupled to the first and second gate voltage supply means and a pre-charge circuit coupled to the common input line, the pre-charge circuit being provided for biasing the voltage of the common input line to a predefined midpoint level.
A method for limiting crowbar current in a CMOS circuit having complementary transistors connected in series between first and second power rails, the method comprising the steps of:
- turning one transistor off while turning a complementary second transistor on in response to a transition of a supplied input signal;
- and
- during the turning on/off operation and independently of the time consumed by the transition of said input signal, causing the transistor that is being turned off to pass through a corresponding midpoint state before the transistor that is being turned on crosses through a similar midpoint state, said midpoint states being such that a hypothetical concurrence of the midpoint states would allow an excessively large crowbar current to flow between the first and second power rails, through the complementary transistors.
A method for limiting crowbar current in a CMOS circuit having first and second complementary output transistors connected in series between first and second power rails, where the CMOS circuit is to respond to transitions of a supplied input voltage from below a first threshold level to above a second threshold level or from above the second threshold level to below the first threshold level, the method comprising the steps of:
- providing a reconvergence control signal having opposed first and second control states;
- providing first and second biasing circuits, the first biasing circuit being for biasing the first output transistor to a non-conductive state in response to the input voltage being below the second threshold level, the second biasing circuit being for biasing the second output transistor to a non-conductive state in response to the input voltage being above the first threshold level;
- providing switching means responsive to the reconvergence control signal,
- the switching means being for selectively driving the second output transistor to a conductive state by way of the first biasing circuit in response to the input voltage being below the second threshold level and in further response to the reconvergence control signal switching from the first to the second control state, and
- the switching means being further for selectively driving the first output transistor to a conductive state by way of the second biasing circuit in response to the input voltage being above the first threshold level and in further response to the reconvergence control signal switching from the first to the second control state;
- and
- switching the reconvergence control signal from the first to the second control state in conformance with movement of said input voltage into a predefined and relatively wide, first high-output impedance voltage range and from there into a predefined and relatively narrower, second high output-impedance voltage range.
A system for limiting crowbar current in a CMOS circuit having first and second complementary output transistors connected in series between first and second power rails, where the CMOS circuit is to respond to transitions of a supplied input voltage from below a first threshold level to above a second threshold level or from above the second threshold level to below the first threshold level, the system comprising:
- a control node for receiving a reconvergence control signal having opposed first and second control states;
- first biasing means, operatively coupled to receive the input voltage, for biasing the first output transistor to a non-conductive state in response to the input voltage being below the second threshold level;
- second biasing means, operatively coupled to receive the input voltage, for biasing the second output transistor to a non-conductive state in response to the input voltage being above the first threshold level;
- and
- switching means, responsive to the reconvergence control signal, for selectively coupling the first biasing circuit to the second output transistor and driving the second output transistor to a conductive state by way of the first biasing circuit in response to the input voltage being below the second threshold level and in further response to the reconvergence control signal switching from the first to the control state,
- said switching means being further for selectively coupling the second biasing circuit to the first output transistor and driving the first output transistor to a conductive state by way of the second biasing circuit in response to the input voltage being above the first threshold level and in further response to the reconvergence control signal switching from the first to the second control state.
Dependencies are inferred from the claim text.