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US 5,296,751 AGranted
Sample-and-hold circuit
AssigneeSharp Kabushiki Kaisha
InventorYoshiki Sano
Life of this patent
Estimating the term…
Abstract
A sample-and-hold circuit includes two capacitors connected to an input signal line through respective analog switches for holding an input signal. An amplifier circuit of the sample-and-hold circuit includes two input terminals for receiving voltages held in the respective two capacitors and for amplifying the received voltages. The amplifier circuit alternately amplifies the voltages received through the two input terminals.
Claims9
A sample-and-hold circuit comprising:
- two capacitors, coupled to an input signal line through respective analog switches, for holding an input signal voltage;
- and
- a differential amplifier circuit, having two non-inverting input terminals for respectively receiving voltages held in said two capacitors and having one inverting input terminal to which an output of said differential amplifier is coupled through a buffer amplifier as a negative feedback signal, for amplifying said received voltages,
- said differential amplifier circuit alternately amplifying said voltages received through said two non-inverting input terminals.
1 more element
A sample-and-hold circuit comprising:
- two capacitors, coupled to an input signal line through respective analog switches, for holding an input signal voltage;
- and
- an amplifier circuit having two non-inverting input terminals for respectively receiving voltages held in said two capacitors and for amplifying said received voltages,
- said amplifier circuit alternately amplifying said voltages received through said two non-inverting input terminals.
1 more element
Dependencies are inferred from the claim text.