Method for achieving an ultra-reliable thin oxide using a nitrogen anneal
AssigneeAdvanced Micro Devices, Inc.
InventorsMark I. Gardner, Henry J. Fulford, Jr.
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AssigneeAdvanced Micro Devices, Inc.
InventorsMark I. Gardner, Henry J. Fulford, Jr.
Estimating the term…
A high-quality tunnel oxide, suitable for EEPROM devices, is formed upon a surface region of a semiconductor body over a heavily-doped N+ layer by first oxidizing the semiconductor body to form an oxide upon the surface region of the semiconductor body over the heavily-doped N+ layer. Next, the semiconductor body is annealed, under a gettering ambient, to densify the oxide and to dope the oxide at its surface and for a portion thereinto near its surface with a gettering agent. The semiconductor body is then oxidized, under an oxidizing ambient, to thicken the oxide, after which it is annealed for a second time, this time under an oxidizing ambient containing nitrogen, to further thicken the oxide and to form a surface layer therein containing a concentration of nitrogen. Tunnel oxides thus fabricated exhibit dramatically improved time-to-breakdown characteristics compared to tunnel oxides processed without such a nitrogen anneal. Furthermore, gate oxides formed earlier in a process sequence, but receiving the same nitrogen anneal, also exhibit markedly improved time-to-breakdown characteristics, as well as substantially improved threshold stability in response to a fixed current passed through the gate oxide.
In an integrated circuit fabrication process, a method for forming a high quality oxide upon a surface region of a semiconductor body, comprising the steps of:
In an integrated circuit fabrication process suitable for EEPROM devices, a method for forming a high-quality tunnel oxide upon a surface region of a semiconductor body over a heavily-doped N+ layer therein, comprising the steps of:
In an integrated circuit fabrication process suitable for EEPROM devices, a method for forming a tunnel oxide upon a first surface region of a semiconductor body over a heavily-doped N+ layer, and further for forming a gate oxide, of greater thickness than the tunnel oxide, upon a second surface region of the semiconductor body, comprising the steps of:
Dependencies are inferred from the claim text.