Fault-tolerant computer system with online recovery and reintegration of redundant components

A fault-tolerant computer system, comprising:

• a) first, second and third CPUs of substantially identical configuration each having local memory, said first, second and third CPUs executing substantially the same instruction stream;
• b) first and second global memory modules of substantially identical configuration, said first and second memory modules storing substantially the same data;
• c) busses coupling each of the first, second and third CPUs individually to each of said first and second global memory modules whereby said first, second and third CPUs access said first and second global memory modules separately and in duplicate;
• d) said CPUs continuing to execute said instruction stream even though one of said first, second and third CPUs is inoperative and continuing to access one of said first and second global memory modules even though the other is inoperative;
• e) said one of said first, second and third CPUs which is inoperative being replaceable into the system without shutdown of the system while the other ones of said CPUs continue execution of said instruction stream;
• f) said one of said first, second and third CPUs which is inoperative being rendered operative and restored to normal function in the system without shutdown of the system while the other ones of said CPUs continue execution of said instruction stream, all of said first, second and third CPUs being soft-reset prior to restoration of said inoperative CPU, said soft-reset non-destructively preserving the current state and local memory of said first, second and third CPUs;
• g) said other of the global memory modules which is inoperative being replaceable into the system without shutdown of the system while said first, second and third CPUs continue to access the global memory module which is operative;
• h) said other of the global memory modules which is inoperative being rendered operative and restored to normal function in the system without shutdown of the system while said first, second and third CPUs continue to access the global memory module which is operative.

A method of operating a computer system including the steps of:

• a) executing the same instruction stream in first, second and third CPUs;
• b) generating global memory accesses in each of said first, second and third CPUs at separate first, second and third global memory access busses;
• c) storing duplicative data in first and second global memory modules having substantially identical address spaces within the address range of said CPUs, including executing accesses to each one of said first and second global memory modules via said first, second and third global memory access busses;
• d) voting each one of said accesses in said first and second global memory modules when received from said first, second and third global memory access busses, said voting including comparing information representing said accesses;
• e) allowing said accesses to be completed only where at least two of said global memory access busses present the same such information;
• f) placing offline one of said first, second and third CPUs when a global memory access from said one is different from the other two upon said voting, then placing said one CPU back online without shutdown of the system after said one of the CPUs is rendered operative, said first, second and third CPUs being soft-reset such that the current state and local memory of each of said first, second and third CPUs are non-destructively preserved prior to continuing normal operation of said first, second and third CPUs.