Circuit and method for determining membership in a set during a fuzzy logic operation

A method for performing a fuzzy logic operation in a data processing system, the fuzzy logic operation determining membership of an input value in a predetermined membership set which is defined by a plurality of boundary values, the method comprising the steps of:

• inputting a membership evaluation instruction to a decoder in the data processing system, initiating execution of the fuzzy logic operation in the data procesisng system based on the membership evaluation instruction being;
• decoding the membership evaluation instruction to provide a plurality of control signals, the membership evaluation instruction being decoded by the decoder;
• subtracting a first one of the plurality of boundary values from the input value to produce a first delta value in response to a first one of the plurality of control signals, an arithmetic logic means being coupled to the decoder for receiving the first one of the plurality of control signals, the arithmetic logic means being used to substract the first one of the plurality of boundary values from the input value;
• concurrently substracting the input value from a second one of the plurality of boundary values to produce a second delta value in response to a second one of the plurality of control signals, the arithmetic logic means being coupled to the decoder for receiving the second one of the plurality of control signals, the arithmetic logic means being used to subtract the input value from the second one of the plurality of boundary values;
• multiplying the first delta value and a third one of the plurality of boundary values to provide a first result in response to a third one of the plurality of control signals, the arithmetic logic means being coupled to the decoder for receiving the third one of the plurality of control signals, the arithmetic logic means multiplying the first delta value and the third one of the plurality of boundary values;
• concurrently multiplying the second delta value and a fourth one of the plurality of boundary values to provide a second result in response to a fourth one of the plurality of control signals, the arithmetic logic means being coupled to the decoder for receiving the fourth one of the plurality of control signals, the arithmetic logic means multiplying the second delta value and the fourth one of the plurality of boundary values;
• and
• inputting a degree of membership signal using a select logic means, the degree of membership signal indicating that the input value is not included in the predetermined membership set when one of the first delta value and the second delta value is less than zero, the degree of membership signal being equal to a minimum value of one of the first result, the second result, and a fifth one of the plurality of boundary values if neither the first delta value nor the second delta value is less than zero, the select logic means being coupled to the arithmetic logic means for receiving the first delta value, the second delta value, the first result, and the second result.