Semiconductor memory
AssigneeNEC Corporation
InventorKazutaka Taniguchi
Life of this patent
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Abstract
A high-speed low-power semiconductor memory comprises a stand-by mode determination circuit for monitoring the internal power source voltage from the voltage drop circuit. The voltage drop circuit comprises an active driver circuit and a stand-by driver circuit as well as an compensating driver circuit. The compensating driver circuit compensates, in response to an output of the stand-by mode determination circuit, for an increase of the internal circuit current. Further, since reduction of internal power source voltage which tends to occur at that time is prevented, the semiconductor memory of this invention can operate stably at high speed.
Claims6
A single chip semiconductor memory operable in either active mode or stand-by mode in response to an external control signal, said semiconductor memory comprising:
- a voltage drop circuit formed on said semiconductor memory chip for stepping an external power source voltage down to a predetermined voltage and supplying the predetermined voltage to an internal circuit as an internal power source voltage for said memory;
- and
- a control circuit formed on said semiconductor memory chip and responsive to a result of a comparison between said internal power source voltage and said predetermined voltage for controlling an amount of current supply of said voltage drop circuit to said internal circuit in stand-by mode so that said internal power source voltage becomes equal to said predetermined voltage.
Dependencies are inferred from the claim text.