Method of erasing data stored in flash type nonvolatile memory cell
AssigneeNEC Corporation
InventorsTakeshi Okazawa, Ken-Ichi Oyama, Hiroki Shirai
Life of this patent
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Abstract
A method of controlling the nonvolatile memory device comprising making over-erasing simultaneously a set of EEPROM elements and then setting simultaneously the threshold voltages of said set of EEPROM elements back to the specified threshold-voltage values. The over-erasing is accomplished by applying a first pulse between the source and the control gate to induce the first FN current across the gate insulating film. The setting-back is accomplished by applying a second pulse between the well and the control gate to induce the second FN current flowing reversely to the first FN current.
Claims15
A method for electrically erasing contents of a plurality of memory cells to shift threshold voltages thereof to an erased threshold value, each of said memory cells including a substrate region of one conductivity type, source and drain regions of the opposite conductivity type formed in the substrate region, a first gate insulating film formed on a channel region of said substrate region between said source and drain regions, a floating gate electrode formed on said first gate insulating film, a second gate insulating film formed on said floating gate electrode, and a control gate electrode formed on said second gate insulating film, said method comprising the steps of:
- applying a first voltage between said source region and said control gate so that a first Fowler-Nordheim tunneling current flows through said first gate insulating film to bring each of said memory cells into an over-erased condition in which a center value in distribution of the threshold voltage of each of said memory cells is shifted to an over-erased threshold value beyond said erased threshold value;
- and
- applying a second voltage between said substrate region and said control gate so that a second Fowler-Nordheim tunneling current flows through said first gate insulating film in a direction opposite to said first Fowler-Nordheim tunneling current to shift the center value in distribution of the threshold voltage of each of said memory cells to said erased threshold value from said over-erased threshold value.
A method for electrically erasing contents of a set of memory cells to shift threshold voltages thereof to an erased threshold value, each of said memory cells includes a substrate region of a p-type, source and drain regions of an N-type formed in the substrate region, a first gate insulating film formed on a channel region of said substrate region between said source and drain regions, a floating gate formed on said first gate insulating film, a second gate insulating film formed on said floating gate, and a control gate formed on said second gate insulating film, said method comprising the steps of:
- applying a negative voltage to said control gate with respect to said source to allow electrons to be released from said floating gate;
- and
- applying a positive voltage to said control gate with respect to said substrate region to allow electrons to be returned from said channel region back to said floating gate.
A method for erasing a plurality of memory cells, each of said memory cells including a substrate region, a source and a drain region, a first insulating film formed on a channel region of said substrate region between said source and drain regions, a floating gate formed on said first insulating film, a second insulating film formed on said floating gate, and a control gate formed on said second insulating film and each of said memory cells storing data therein by retaining carriers into said floating gate and being brought into an erased state by shifting a threshold voltage thereof to an erased threshold value, said method comprising the steps of:
- applying a first voltage between said source regions and said control gate to allow said carriers to be released from said floating gate to shift the threshold voltage of each of said memory cell to an over-erased value beyond said erased threshold value;
- and
- applying a second voltage between said substrate region and said control gate to inject carriers into said floating gate to shift the threshold voltage of each of said memory cells to said erased threshold value from said over-erased value.
Dependencies are inferred from the claim text.