Pulse generation circuit for row selection pulses and method for generating said pulses
AssigneePlanar International Oy
InventorTerho Harju
Life of this patent
Estimating the term…
Abstract
The present invention relates to a pulse generation circuit and drive scheme for row selection pulses in a symmetric control scheme of AC-excited thin-film electroluminescent (ACTFEL) displays. The circuit comprises a supply voltage source for feeding the circuit with the supply voltages, a circuit ground to establish the ground potential, two control inputs for controlling the pulse-generating circuit, an output for routing the row selection pulses to the display acting as the load, and an essentially symmetric circuit with respect to the circuit ground for generating the opposite-polarity row selection pulses.
Claims12
A pulse generation circuit for row selection pulses in a symmetric control scheme of an AC-excited thin-film electroluminescent display, the circuit comprising a supply voltage source for the circuit, a circuit ground to establish ground potential, first and second control inputs for controlling the circuit, an output for coupling the row selection pulses to the display as a capacitive load, and an essentially symmetric circuit with respect to the circuit ground, one-half of the symmetric circuit generating positive-voltage row selection pulses and the other half of the symmetric circuit generating negative-voltage row selection pulses;
- the circuit for generating the positive-voltage row selection pulses comprising:
- a first inductor (L1) having an input terminal and an output terminal and being placed in series with the capacitive load, the first inductor (L1) being resonant with the load capacitance so that the cycle time of resonant oscillations is 100-200% longer than an added duration of time periods reserved for positive row selection pulse rise and fall phases:
- a positive supply voltage source (V.sub.wrp) having a voltage level;
- a first switch (S1) having an input terminal and an output terminal, said first switch output terminal being connected to the input terminal of the first inductor (L1) and said input terminal of the first switch being coupled to the positive supply voltage source (V.sub.wrp) for charging the load capacitance via the first inductor;
- a second switch (S3) placed between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for the purpose of elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- a third switch (S2) having first and second terminals and being coupled between the input terminal of the first inductor (L1) and ground potential for discharging energy stored in the load capacitance;
- a first reverse biased clamp diode (D1) being connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second reverse biased clamp diode (D2) being connected from the input terminal of the first inductor (L1) to ground potential, a third reverse biased clamp diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth reverse biased clamp diode (D4) being connected from the output terminal of the first inductor (L1) to ground for recovering energy stored in the first inductor (L1) during the charging phase of the load and for limiting the output voltage;
- and
- a first feedback circuit (FB1) coupling the output terminal of the first inductor (L1) to the first switch (S1) for turning the first switch to an ON or an OFF state.
A pulse generation circuit for row selection pulses in a symmetric control scheme of an AC-excited thin-film electroluminescent display, the circuit comprising a supply voltage source for the circuit, a circuit ground to establish ground potential, first and second control inputs for controlling the circuit, an output for coupling the row selection pulses to the display as a capacitive load, and an essentially symmetric circuit with respect to the circuit ground, one-half of the symmetric circuit generating positive voltage row selection pulses and the other half of the symmetric circuit generating negative-voltage row selection pulses;
- the circuit for generating the positive-voltage row selection pulses comprising:
- a first inductor (L1) having an input terminal and an output terminal placed in series with the capacitive load, the first inductor (L1) being resonant with the load capacitance so that the cycle time of resonant oscillations is 100-200% longer than an added duration of time periods reserved for positive row selection pulse rise and fall phases;
- a positive supply voltage source (V.sub.wrp) having a voltage level;
- an auxiliary positive voltage supply (V.sub.wrp/2) whose output voltage is approximately one-half of the positive supply voltage source (V.sub.wrp);
- a first switch (S1) having an input terminal and an output terminal and being placed between the first inductor (L1) and the auxiliary positive supply voltage source (V.sub.wrp/2) for charging the load capacitance via the first inductor (L1);
- a second switch (S3) placed between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for the purpose of elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- a third switch (S2) coupled between the input terminal of the first inductor (L1) and ground potential for discharging energy stored in the load capacitance;
- and
- a first reverse biased clamp diode (D1) connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second reverse biased clamp diode (D2) being connected from the input terminal of the first inductor (L1) to ground, a third reverse biased clamp diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth reverse biased clamp diode (D4) being connected from the output terminal of the first inductor (L1) to ground for recovering energy stored in the first inductor during the charging phase of the load and for limiting the output voltage.
A pulse generation circuit for row selection pulses in a symmetric control scheme of an AC-excited thin-film electroluminescent display, the circuit comprising a supply voltage source for the circuit, a circuit ground to establish ground potential, first and second control inputs for controlling the circuit, an output for coupling the row selection pulses to the display as a capacitive load, and an essentially symmetric circuit with respect to the circuit ground, one-half of the symmetric circuit generating positive-voltage row selection pulses and the other half of the symmetric circuit generating negative-voltage row selection pulses;
- the circuit for generating the positive-voltage row selection pulses comprising:
- a first inductor (L1) having an input terminal and an output terminal and being placed in series with the capacitive load, the first inductor (L1) being resonant with the load capacitance so that the cycle time of resonant oscillations is 100-200% longer than an added duration of time periods reserved for positive row selection pulse rise and fall phases;
- a positive supply voltage source (V.sub.wrp) having a voltage level;
- a first switch (S1) having an input terminal and an output terminal;
- an auxiliary positive voltage supply (V.sub.wrp/2) whose output voltage is approximately one-half the output voltage of the positive supply voltage source (V.sub.wrp);
- a charging diode (D5) coupling the output terminal of the first switch (S1), which performs the charging of the load capacitance, to the input terminal of the first inductor (L1);
- the input terminal of the first switch (S1) being coupled to the auxiliary positive voltage supply (V.sub.wrp/2);
- a second switch (S3) placed between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for the purpose of elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- a modulation voltage power supply (V.sub.m);
- a third switch (S2) having first and second terminals and being coupled between the input terminal of the first inductor (L1) and the modulation voltage power supply (V.sub.m) for discharging energy stored in the load capacitance;
- and
- a first reverse biased clamp diode (D1) being connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second reverse biased clamp diode (D2) being connected from the input terminal of the first inductor (L1) to ground potential, a third reverse biased clamp diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth reverse biased clamp diode (D4) being connected from the output terminal of the first inductor (L1) to ground for recovering energy stored in the first inductor (L1) during the charging phase of the load and for limiting the output voltage.
A method of generating positive and negative row selection pulses in a circuit for symmetric control of an AC-excited thin-film electroluminescent display providing a capacitive load, the positive voltage row selection pulses being generated by a method comprising the steps of:
- placing a first inductor (L1) having an input terminal and an output terminal in series with the capacitive load and matching the inductance of the first inductor to resonate with the load capacitance so that the cycle time of the resonant oscillations is 100-200% longer than an added duration of time periods reserved for row selection pulse rise and fall phases;
- providing a positive supply voltage source (V.sub.wrp) having a positive voltage level;
- coupling the output terminal of a first switch (S1) to the input terminal of the first inductor (L1) and the input terminal of the first switch (S1) to the positive supply voltage source (V.sub.wrp) to charge the load capacitance via the first inductor (L1);
- placing a second switch (S3) between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- placing a third switch (S2) having input and output terminals between the input terminal of the first inductor (L1) and ground potential for discharging energy stored in the load capacitance;
- recovering energy stored in the first inductor (L1) during the charging phase by extending the time for either or both charging and discharging of the capacitive load and by transferring the recovered stored energy to the positive supply voltage source (V.sub.wrp) through the use of clamp diodes, a first clamp diode (D1) being connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second clamp diode (D2) being connected from the input terminal of the first inductor (L1) to ground potential, a third clamp diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth clamp diode (D4) being connected from the output terminal of the first inductor (L1) to the ground potential;
- and
- controlling the first switch (S1) by a feedback circuit (FB1) coupled between the output terminal of the first inductor (L1) and the first switch (S1) for turning the first switch (S1) to an ON or an OFF state.
In a method of generating positive and negative row selection pulses in a circuit for symmetric control of an AC-excited thin-film electroluminescent display providing a capacitive load, the positive voltage row selection pulses being generated by a method comprising the steps of:
- placing a first inductor (L1) having an input terminal and an output terminal directly in series with the capacitive load and matching the inductance of the first inductor (L1) to resonate with the load capacitance so that the cycle time of the resonant oscillations is 100-200% longer than an added duration of time periods reserved for positive row selection pulse rise and fall phases;
- providing a positive supply voltage source (V.sub.wrp) having a positive voltage level;
- providing an auxiliary positive voltage supply (V.sub.wrp/2) whose output voltage is approximately one-half the output voltage of the positive supply voltage source (V.sub.wrp);
- coupling the output terminal of a first switch (S1) to the input terminal of the first inductor (L1) and the input terminal of the first switch (S1) to the auxiliary positive supply voltage source (V.sub.wrp/2) to charge the load capacitance via the first inductor (L1);
- placing a second switch (S3) between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- placing a third switch (S2) having input and output terminals between the input terminal of the first inductor (L1) and ground potential for discharging energy stored in the load capacitance;
- recovering energy stored in the first inductor (L1) during the charging phase by extending the time for either or both charging and discharging of the capacitive load and by transferring the recovered stored energy to the positive supply voltage source (V.sub.wrp) through the use of clamp diodes, a first clamp diode (D1) being connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second diode (D2) being connected from the input terminal of the first inductor (L1) to ground, a third clamp diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth diode (D4) being connected from the output terminal of the first inductor (L1) to ground.
In a method of generating positive and negative row selection pulses in a circuit for symmetric control of an AC-excited thin-film electroluminescent display providing a capacitive load, the positive voltage row selection pulses being generated by a method comprising the steps of:
- placing a first inductor (L1) having an input terminal and an output terminal in series with the capacitive load and matching the inductance of the first inductor (L1) to resonate with the load capacitance so that the cycle time of the resonant oscillations is 100-200% longer than an added duration of time periods reserved for positive row selection pulse rise and fall phases;
- providing a positive supply voltage source (V.sub.wrp) having a positive voltage level;
- providing an auxiliary positive voltage supply (V.sub.wrp/2) whose output voltage is approximately one-half of the output voltage of the positive supply voltage source (V.sub.wrp);
- coupling the output terminal of a first switch (S1) to the input terminal of the first inductor (L1) and the input terminal of the first switch (S1) to the auxiliary positive supply voltage source (V.sub.wrp/2) to charge the load capacitance via the first inductor (L1);
- placing a second switch (S3) between the positive supply voltage source (V.sub.wrp) and the output terminal of the first inductor (L1) for elevating the amplitude of the positive row selection pulses to the voltage level of the positive supply voltage source (V.sub.wrp) and preventing backward oscillation;
- a modulation voltage power supply (V.sub.m);
- placing a third switch (S2) having input and output terminals between the input terminal of the first inductor (L1) and the modulation voltage power supply (V.sub.m) for discharging energy stored in the load capacitance;
- recovering energy stored in the first inductor (L1) during the charging phase by extending the time for either or both charging and discharging of the capacitive load and by transferring the recovered stored energy to the positive supply voltage source (V.sub.wrp) through the use of clamp diodes, a first clamp diode (D1) being connected from the input terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp), a second diode (D2) being connected from the input terminal of the first inductor (L1) to ground, a third diode (D3) being connected from the output terminal of the first inductor (L1) to the positive supply voltage source (V.sub.wrp) and a fourth diode (D4) being connected from the output terminal of the first inductor (L1) to ground.
Dependencies are inferred from the claim text.