Two-stage rail-to-rail class AB operational amplifier

An operational amplifier having a differential signal input and an output, comprising:

• a. an input stage comprising a differential amplifier having a differential signal input and a differential signal output, said differential amplifier including:
• i. a first pair of transistors of opposite conductivity type having control elements connected to receive one side of the differential signal input;
• ii. second and third pairs of transistors of opposite conductivity type having control elements connected to receive another side of the differential signal input, the differential output of said differential amplifier being developed by outputs of said second and third pairs of transistors;
• iii. a summing circuit for summing the currents in said first, second, and third transistor pairs to produce the differential output of the input stage on first and second differential output nodes;
• and
• iv. a circuit for clamping the first and second differential output nodes at a predetermined level with respect to the supply voltage and reference potential;
• b. and a high-swing output section connected to receive said differential signal output directly from said input stage.

An operational amplifier having a differential signal input and an output, comprising:

• a. an input stage comprising a differential amplifier having a differential signal input and a differential signal output, said differential amplifier including:
• i. a first and fourth pair of transistors of opposite conductivity type having control elements connected to receive one side of the differential signal input;
• ii. second and third pairs of transistors of opposite conductivity type having control elements connected to receive another side of the differential signal input, the differential output of said differential amplifier being developed by outputs of said second and third pairs of transistors;
• iii. a summing circuit for summing the currents in said first, second, third, and fourth transistor pairs to produce the differential output of the input stage on first and second differential output nodes;
• and
• iv. a circuit for clamping the first and second differential output nodes at a predetermined level with respect to the supply voltage and reference potential;
• b. a high-swing output section connected to receive said differential signal output directly from said input stage;
• c. and a circuit to bias said high-swing output section to operate in class-AB mode.