Integrated circuit capable of testing reliability
AssigneeSharp Kabushiki Kaisha
InventorJunji Tanaka
Life of this patent
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Abstract
An integrated circuit having a predetermined function includes a signal generating circuit for generating a signal for performing a reliability test predetermined in the integrated circuit, a detecting circuit for outputting a signal which indicates a detection at a time when a rise of a supply voltage to the integrated circuit is detected, and a control circuit for controlling the integrated circuit so that a predetermined reliability test of the integrated circuit is performed by using the signal output from the signal generating circuit in case that a predetermined selection signal is applied to an input terminal of the control circuit in response to the signal output from the detecting circuit at a time of a rise of the supply voltage.
Claims7
An integrated circuit adapted to perform a predetermined reliability test, comprising:
- a signal generating circuit for generating a signal for performing said predetermined reliability test in said integrated circuit;
- a detecting circuit for outputting a signal which indicates a detection at a time when a rise of a supply voltage to said integrated circuit is detected;
- and
- a control circuit connected to both said signal generating circuit and said detecting circuit and having a test mode setting terminal for controlling an operation of said predetermined reliability test of said integrated circuit,
- said integrated circuit being arranged to execute said predetermined reliability test thereof in accordance with said control circuit which is adapted to use said signal output from said signal generating circuit in case that a predetermined selection signal is applied to said test mode setting terminal in response to said signal output from said detecting circuit at a time of a rise of said supply voltage,
- said integrated circuit being further arranged to perform a normal operation in case that no predetermined selection signal is applied to said test mode setting terminal.
An integrated circuit having a shift register and to be operated on a signal being shifted in said shift register according to a clock signal, said integrated circuit comprising:
- a signal generating circuit for generating said clock signal,
- a detecting circuit for outputting a signal which indicates a detection at a time when a rise of a supply voltage to said integrated circuit is detected;
- and
- a control circuit connected to both signal generating circuit and said detecting circuit for controlling an operation of a reliability test of said integrated circuit,
- said integrated circuit being arranged that a cyclic operation of said integrated circuit for said reliability test thereof is performed by applying said clock signal output from said signal generating circuit to said shift register and for outputting a signal from a final stage of said shift register to a first stage of said shift register in case that a predetermined terminal voltage is applied to said control circuit in response to said signal output from said detecting circuit at a time of said rise of said supply voltage.
Dependencies are inferred from the claim text.