Data processor having an output terminal with selectable output impedances

A method for controlling output impedance of a circuit in an integrated circuit, comprising the steps of:

• providing a plurality of output buffers, each output buffer having a predetermined buffer output impedance;
• connecting each output buffer to an information input terminal of the circuit and directly connecting each output buffer to a common node which is coupled to an output terminal of the circuit;
• providing a storage device for receiving a user controllable signal having a value which is controlled by a user of the integrated circuit and which may be varied by a user only during a reset mode of operation of the integrated circuit;
• providing each output buffer with a control terminal for receiving a control signal;
• and
• allowing the user of the circuit to select a value of the control signal to permit the user of the circuit to select one of a plurality of predetermined, discrete output impedance values for the output terminal of the circuit, the user being able only during the reset mode of operation of the integrated circuit to change an output impedance of the output terminal from a first substantially constant impedance to a second substantially constant impedance by modifying the value of the control signal in response to providing a select signal at an input pin of the integrated circuit.