Concurrent context memory management unit
AssigneeAT&T Bell Laboratories
InventorsCraig W. Jensen, Frederick R. Keller
Life of this patent
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Abstract
A memory management arrangement facilitates interprocess data transfers by eliminating the need to construct temporary mapping tables when performing the data transfer operation. The arrangement includes the use of multiple and concurrent mapping tables in conjunction with the transmission of mapping table indentification bits with each data transfer operation.
Claims8
A memory management unit for use in controlling data storage and retrieval from a memory, said memory management unit translating virtual addresses to physical addresses within said memory, said virtual addresses being received from a plurality of sources along with, for each received instruction, a read or a write instruction, each source having at least one virtual address mapped to at least one physical address, said memory management unit comprising
- means for storing a set of translation information for each of said plurality of sources, each set of translation information mapping at least one virtual address to a respective physical address,
- recording means including a read register and a write register for concurrently recording identities, each of a different one of said plurality of sources, and
- means, responsive to an instruction received from a particular one of said plurality of different sources, for selecting, for use by said memory management unit, the one of said sets of translation information that is stored for the source whose identity is recorded a) in said read register, if said received instruction is a read instruction, or b) in said write register, if said received instruction is a write instruction.
In a system having a memory management unit (MMU) interposed between a plurality of sources of virtual addresses provided by a central processing unit (CPU) and a memory having physical locations to which the virtual addresses are mapped, and wherein the same virtual address from different sources may be mapped to the same physical location within said memory, and wherein said MMU contains a first set of translation mapping information for controlling the storage or retrieval of information to or from said memory in response to virtual addresses presented to said MMU, said first set of translation information being associated with a first source of presented virtual addresses, the improvement comprising
- means for storing within said MMU at least one other set of translation information associated with a second source of virtual addresses,
- means for establishing a plurality of sets of translation information that are concurrently accessible within one CPU execution cycle, including said first set and the other set, for controlling each translation between a presented virtual address and its associated physical address, and
- means operative in response to mode control information from said first source associated with each said presented virtual address for utilizing either one accessible set of translation information or said concurrently accessible plurality of sets of translation information.
Dependencies are inferred from the claim text.