US 5,293,558 AGranted

Multiplication, division and square root extraction apparatus

AssigneesHitachi, Ltd., Hitachi Engineering Co., Ltd.

InventorsMasahisa Narita, Hisashi Kaziwara, Takeshi Asai, Shigeki Morinaga, Hiroyuki Kida, Mitsuru Watabe, Tetsuaki Nakamikawa, Shunpei Kawasaki, Junichi Tatezaki, Norio Nakagawa, Yugo Kashiwagi

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Abstract

A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.

Claims5

Dependent claims

A multiplication, division and square root extraction apparatus which, for carrying out multiplication, division and square root extraction calculations, calculates approximate solutions of multiplication, division and square root extraction functions by iteration through repeated multiplication, addition and subtraction, said apparatus comprising:

a multiplier of prescribed bit width, having first and second inputs and an output, for carrying out multiplication between respective values of a prescribed number of bits received at said first and second inputs, and for supplying the product of said values at said output;
a subtractor of prescribed bit width connected to said output of said multiplier for subtracting said product from a prescribed value and for outputting the result of the subtraction;
a data transfer device, connected to said output of said subtractor and said first and second inputs of said multiplier, for transferring said output of said subtractor to a selected one of said first and second inputs of said multiplier according to an iteration algorithm;
and
a square root extraction approximation means for calculating a first product of a square of an approximate value and the number whose square root is to be obtained, subtracting said first product from a constant, calculating a second product of the result of the subtraction, the approximate value and another constant, and providing said second product for a subsequent approximation.

2 more elements

a multiplier of prescribed bit width, having a first and second inputs and an output, for carrying out multiplication between respective values of a prescribed number of bits received at said first and second inputs, and for supplying the product of said values at said output;
a subtractor of prescribed bit width connected to said output of said multiplier for subtracting said product from a prescribed value and for outputting the result of the subtraction;
a data transfer device, connected to said output of said subtractor and said first and second inputs of said multiplier, for transferring said output of said subtractor to a selected one of said first and second inputs of said multiplier according to an iteration algorithm;
shift means, having a second bit width greater than the prescribed bit width of said multiplier, for shifting a result produced by said multiplier;
arithmetic and logic means, having a second bit width connected to said shift means, for processing an output o the sift means and another result produced by said multiplier;
and
a second data transfer device connected to said data transfer device through a switch means, also connected to said shift means and said arithmetic and logic means, for transferring a product from said multiplier to said shift means and/or said arithmetic and logic means, and a result of said arithmetic and logic means to said multiplier.

4 more elements

Dependencies are inferred from the claim text.