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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsToshikazu Suzuki, Hisakazu Kotani, Hironori Akamatsu
Estimating the term…
A semiconductor integrated circuit contains a plurality of programmable circuits each including a plurality of fuses and a first transistor which has a gate subjected to an address decoded signal, a drain connected to first ends of the fuses, and a source connected to a common precharge node. The address decoded signal results from decoding a first portion of an address signal for access to memory cells. The sources of the first transistors in the respective programmable circuits are connected to the common precharge node. A plurality of second transistors have gates subjected to a second portion of the address signal, sources connected to a first power supply line, and drains connected to second ends of the fuses in each of the programmable circuits respectively. The second portion of the address signal differs from the first portion of the address signal. A third transistor has a gate subjected to a precharge control signal, a source connected to a second power supply line, and a drain connected to the common precharge node.
A semiconductor integrated circuit comprising:
A semiconductor integrated circuit comprising:
A semiconductor integrated circuit comprising:
Dependencies are inferred from the claim text.