Switched capacitor circuit for precision resistance

In a differential amplifier circuit having a first resistance between a first input signal and a first amplifier input, a second resistance between a second input signal and a second amplifier input, a switched capacitor circuit for the first and second resistances, the switched capacitor circuit comprising the following:

• first and second capacitors, each having a first capacitor terminal and a second capacitor terminal;
• first, second and third clock signals,
• wherein a rising edge of the second clock signal follows a falling edge of the third clock signal, a falling edge of the second clock signal precedes a rising edge of the third clock signal, a rising edge of the first clock signal follows the rising edge of the second clock signal and a falling edge of the first clock signal precedes the falling edge of the second clock signal;
• first switch means for connecting the first capacitor terminal of the first and second capacitors to one of the following:
• the first and second input signals respectively when the second clock signal is logically TRUE;
• the second and first input signals respectively when the second clock signal is logically FALSE;
• and
• second switch means for connecting the second capacitor terminal of the first and second capacitors to one of the following:
• an analog ground when the first clock signal is logically TRUE;
• the first and second amplifier inputs respectively when the third clock signal is logically TRUE;
• floating when the first and third clock signals are logically FALSE.