Pseudo-Random scan test apparatus
AssigneeTandem Computers Incorporated
InventorsAlbert Jordan, Peter L. Fu, David J. Garcia
Life of this patent
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Abstract
Disclosed is a circuit configuration that permits the monitoring of the operation of an input/output circuit of a digital unit under test by pseudo-random scan test techniques. A resistive element couples test signals to an input/output terminal of the device under test to which the input/output circuit is connected. The connection between the resistive element and the terminal is monitored during pseudo-random scan testing, permitting testing of the input/output circuitry.
Claims6
In a system for performing pseudo-random testing of a digital device, the digital device having input/output terminals and an input/output circuit means coupled to at least one of the input/output terminals, the input/output circuit means being operable in a first mode for receiving a digital input signal and in a second mode for applying a digital output signal to the one input/output terminal, apparatus for monitoring the input/output circuit means during pseudo-random testing of the digital device, the apparatus comprising:
- output means for providing a digital test signal;
- impedance means for coupling the digital test signal to the one input/output terminal, the impedance means having an impedance value such that when the input/output circuit means is in the second mode, and, at the same time, the digital test signal is applied to the one input/output terminal, the digital output signal dominates to produce a representative signal indicative of the digital output signal at the one input/output terminal;
- and
- monitoring means coupled to receive the digital test signal or the representative signal appearing at the one input/output terminal.
Apparatus for monitoring operation of an input/output circuit coupled to an input/output terminal of a digital device under test by pseudo-random testing, the input/output circuit being operable in a first mode for receipt of an input signal at the input/output terminal, and in a second mode for applying an output signal to the input/output terminal, the apparatus comprising:
- output means for providing a test signal;
- resistance means coupling the output means to the input/output terminal, the resistance means having a value sufficient to permit the output signal to predominate at the input/output terminal when both the output means and the input/output circuit are providing the test signal and the output signal, respectively, to the input/output terminal;
- and
- input means coupled to receive the test signal or the output signal appearing at the input/output terminal.
Dependencies are inferred from the claim text.