High speed logic circuit

A high speed logic circuit comprising:

• a vertical hetero-junction bipolar transistor, in which two-dimensional carriers formed at a semiconductor hetero-junction interface are used as a base layer, the uppermost layer being a collector layer, the lowest layer being an emitter layer;
• and wherein
• said bipolar transistor has two base electrodes contacted with said base layer, putting a collector electrode therebetween;
• a field effect transistor using said two-dimensional carriers as an active layer is formed, one of the base electrodes being a drain electrode, the other being a source electrode, said collector electrode being a gate electrode;
• the emitter of said bipolar transistor is grounded;
• said one of the base electrodes serves as an input;
• an output is taken out from said collector;
• and said field effect transistor is used as an injector, said other base electrode used at the same time as the source electrode of said field effect transistor being connected with a power supply.

A semiconductor device comprising:

• a semi-insulating substrate;
• a first semiconductor layer formed on said semi-insulating substrate and having a first conductivity type;
• a second semiconductor layer formed on said first semiconductor layer and having a second conductivity type;
• a third semiconductor layer formed on a part of said second semiconductor layer and having the first conductivity type;
• a first electrode connected electrically with said first semiconductor layer;
• a pair of second electrodes disposed so as to put said third semiconductor layer therebetween and connected electrically with said second semiconductor layer;
• and
• a third electrode connected electrically with said third semiconductor layer;
• and wherein
• said first electrode is connected with a first power supply, and one of said second electrodes is connected with a second power supply, a signal being inputted through the other of said second electrodes and outputted from said third electrode.

A high speed logic circuit comprising:

• an input node, through which a logic signal is inputted;
• an output node, through which a logic signal is outputted;
• a bipolar transistor having a base connected with said input node, an emitter connected with a ground potential, and a collector connected with said output node;
• and
• a field effect transistor having a gate connected with a collector of said transistor, drain connected with a base of said transistor, and a source connected with a power supply.