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US 5,293,062 AGranted
FET nonvolatile memory with composite gate insulating layer
AssigneeRohm Co., Ltd.
InventorHironobu Nakao
Life of this patent
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Abstract
A gate insulating layer, which is formed on a channel region of a semiconductor substrate and interposed between the semiconductor substrate and a gate electrode, consists of a first part and a second part adjoining each other. The first part includes an oxide lower layer and a nitride upper layer, and a second part includes a nitride lower layer and an oxide upper layer.
Claims4
A field effect transistor nonvolatile memory having a gate insulating layer formed on a channel region of a semiconductor substrate and interposed between a gate electrode and the semiconductor substrate, said gate insulating layer comprising:
- a first part including a first oxide layer formed on and in direct contact with the channel region and a first nitride layer formed between the gate electrode and the first oxide layer;
- and
- a second part including a second nitride layer formed on and in direct contact with the channel region and a second oxide layer formed between the gate electrode and the second nitride layer;
- wherein the first and second parts are arranged adjacent to each other between a source region and a drain region.
1 more element
Dependencies are inferred from the claim text.