US 5,291,603 A · Microprocessor system with multiple interrupts masked for use in electronic control or monitoring of various solid-state products

Abstract

A microprocessor used in solid state products has multiple interrupts and a single read only memory (ROM) masked for two or more product programs. The logic state of an input pin is set to select the appropriate program. If there is an error in one program or it becomes obsolete, the microprocessor does not have to be scrapped, but can be used to execute the other (another) product program. Separate interrupt selection routines for each interrupt, addressed from a common interrupt vector table, direct program execution to an interrupt branch table for the product indicated by the input pin. The product branch table contains addresses for the interrupt service routines for the selected product. The product programs are first separately linked with the interrupt branch table for the corresponding product. The common interrupt vector table and the interrupt selection routines are then linked with one product program and its interrupt branch table, before final linkage of all software components to avoid conflicts should a program be changed.

Claims9

Dependent claims

A digital processor system for alternatively executing a selected one of a plurality of independent application programs, said system comprising:

a microprocessor having means for accepting multiple interrupts;
a single read only memory (ROM) masked to store said plurality of independent application programs and to store a common interrupt vector table accessed by said microprocessor in response to an active interrupt, an interrupt selection routine for each interrupt, and an interrupt service routine for each interrupt for each of said plurality of independent application programs;
and
program selection means for generating a selection signal designating a selected application program for execution by the microprocessor so that the selected one of the application programs is alternatively executed;
said common interrupt vector table containing addresses of said interrupt selection routines, said interrupt selection routines responding to said program selection means and directing the microprocessor to an interrupt service routine for the active interrupt for the selected application program for execution by said microprocessor.

2 more elements

A method of masking a single ROM for use by a microprocessor accepting multiple interrupts in alternatively executing a selected one of a plurality of application programs said method comprising the steps of:

providing said plurality of application programs;
providing a separate interrupt service routine for each of said multiple interrupts for each of said plurality of application programs;
providing a program selection routine for each of said multiple interrupts including jump instructions transferring execution by the microprocessor in response to an interrupt to an interrupt service routine for a selected application program;
providing a common interrupt vector address table containing an address for each program selection routine to be accessed by said microprocessor in response to an active interrupt;
linking said common interrupt vector address table and said program selection routines together with one of said application programs;
linking all other application programs with the one application program linked with the common interrupt vector address table and said program selection routines;
and
masking said single ROM to store said linked application programs, common interrupt vector address table and program selection routines so that said microprocessor alternatively executes said selected one of said plurality of application programs.

5 more elements

Dependencies are inferred from the claim text.

Microprocessor system with multiple interrupts masked for use in electronic control or monitoring of various solid-state products

Life of this patent

Microprocessor system with multiple interrupts masked for use in electronic control or monitoring of various solid-state products

Life of this patent

Abstract

Claims9