Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails

A semiconductor memory device receiving externally applied first and second power supply voltages and having n-bits configurations, said first power supply voltage may not be applied when said second power supply voltage is applied, comprising:

• memory cells arranged in rows and columns;
• n amplifier means supplied with first power supply voltage for amplifying n data bit signals read out from said memory cells to provide n amplified signals,
• said n amplifier means providing n unstable output signals having an unstable potential when said first power supply voltage is not applied;
• n data output terminals;
• n driving means each receiving said second power supply voltage for driving a load connected to corresponding one of said data output terminals in response to the amplified signal provided from corresponding said amplifier means;
• each said driving means consuming more current when said corresponding amplifier means provides said unstable output signal;
• power supply failure detecting means supplied with the first and second power supply voltages for detecting failure of said first power supply voltage;
• and
• power fixing mans for fixing a potential of then amplified signals provided from said n amplifier means to a predetermined potential in response to said power supply failure detecting means.