Operational amplifier

An operational amplifier including a non-inverting input terminal and an inverting input terminal, comprising:

• differential amplification means including a first differential amplification circuit having a non-inverting input end connected to said non-inverting input terminal and an inverting input end connected to said inverting input terminal, and a second differential amplification circuit having a non-inverting input end connected to said non-inverting input terminal and an inverting input end connected to said inverting input terminal;
• current mirror means including;
• a first current mirror circuit, an output end of the first differential amplification circuit associated with the non-inverting inverting input end of said first differential amplification circuit being connected to an input end of the first current mirror circuit;
• and
• a second current mirror circuit, an output end of the second differential amplification circuit associated with the non-inverting input end of said second differential amplification circuit being connected to an input end of the second current mirror circuit;
• and
• a load impedance element connected together to output ends of said first and second current mirror circuits;
• the differential amplification means and current mirror means being adapted to connect to a first power supply for supplying a first reference potential to an output end associated with the inverting input end of said first differential amplification circuit, and a second power supply for supplying a second reference potential to an output end associated with the inverting input end of said second differential amplification circuit;
• said first differential amplification circuit including:
• a first transistor of NPN type having its base connected to said non-inverting input terminal, and its collector connected to the input end of said first current mirror circuit, and
• a second transistor of NPN type having its base connected to said inverting input terminal and its collector adapted to be connected to said first power supply;
• and
• said second differential amplification circuit including:
• a third transistor of PNP type having its base connected to said non-inverting input terminal and its collector connected to the input end of said second current mirror circuit, and
• a fourth transistor of PNP type having its base connected to said inverting input terminal and its collector adapted to be connected to said second power supply;
• and further comprising a first phase compensation capacitance coupled to the output end of the first current mirror circuit and adapted to be connected to the first power supply;
• and a second phase compensation capacitance coupled to the output end of the second current mirror circuit and adapted to be connected to the second power supply.