Method of making complementary heterostructure field effect transistors
AssigneeTexas Instruments Incorporated
InventorsHan-Tzong Yuan, Hisashi Shichijo, Hung-Dah Shih
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Abstract
Complementary heterostructure field effect transistors (30) with complementary devices having complementary gates (40, 50) and threshold adjusting dopings are disclosed. Preferred embodiment devices include a p.sup.+ gate (50) formed by diffusion of dopants to convert n.sup.+ gate material to p.sup.+, and a pulse-doped layer adjacent the two-dimensional carrier gas channels to adjust threshold voltages. Further preferred embodiments have the conductivity-type converted gate (50) containing a residual layer of unconverted n.sup.+ which cooperates with the pulse-doped layer threshold shifting to yield threshold voltages which are small and positive for n-channel and small and negative for p-channel devices.
Claims16
A method for fabricating complementary heterostructure field effect transistors, comprising the steps of:
- (a) providing a layered semiconductor structure with a first channel layer of a first semiconductor material, a second insulating layer of a second semiconductor material having a bandgap larger than the bandgap of said first material on said first layer, and a third layer of a third semiconductor material on said second layer;
- said first and second layers forming a heterojunction, and said third layer doped a first conductivity type;
- (b) forming first and second gates in said third layer, said first gate being an n-channel gate and said second gate being a p-channel gate which is p+ doped by outdiffusion, said p+ doping characterized by a doping profile of diffusion of p dopants through said p-channel gate which was previously n+ uniformly doped, said diffusion being of sufficient dopant concentration to convert said n+ uniform doping to p+ doping in all but a residual layer adjacent said insulator layer with a supply of p+ dopants;
- (c) forming n-type source and drain regions in said first and second layers adjacent said first gate;
- (d) forming p-type source and drain regions in said first and second layers adjacent said second gate;
- and
- (e) forming contacts to said source regions, drain regions, and gates.
A method for fabricating complementary heterostructure field effect transistors, comprising the steps of:
- (a) providing a layered semiconductor structure with a first channel layer of a first semiconductor material, a second insulating layer of a second semiconductor material having a bandgap larger than the bandgap of said first material on said first layer, and a third layer of a third semiconductor material on said second layer;
- said first and second layers forming a heterojunction, and said third layer doped a first conductivity type;
- (b) forming first and second gates in said third layer, said first gate being an n-channel gate and said second gate being a p-channel gate with a supply of dopants for a second conductivity type opposite said first conductivity type on said second gate;
- (c) forming first source and drain regions in said first and second layers adjacent said first gate;
- (d) forming second source and drain regions in said first and second layers adjacent said second gate;
- (e) diffusing said dopants from said supply on said second gate to convert said second gate to said second conductivity type;
- and
- (f) forming contacts to said source regions, drain regions, and gates.
Dependencies are inferred from the claim text.