Method of manufacturing semiconductor devices
AssigneeFujitsu Limited
InventorShunji Nakamura
Life of this patent
Estimating the term…
Abstract
Semiconductor devices having a reduced parasitic capacitance while having a maximum acceptable current similar to those of prior devices, and a method of manufacturing thereof are disclosed. The inventive device has a hole at the bottom of which an insulating film separated from the hole walls is located, a semiconductor film being present in the hole, which is connected to the semiconductor substrate adjacent to the insulating film and a conductor film constituting a portion of the hole wall, and extends onto the insulating film so as to cover at least part of the film.
Claims4
A method of manufacturing a semiconductor device, comprising the following steps:
- on a semiconductor substrate surface at the bottom of a hole that goes through three layers of a first insulating film formed on the substrate, a first conductor film formed on the first insulating film, and a second insulating film formed on the first conductor film, and reaches the substrate surface, forming a third insulating film separated from the inside walls of the hole;
- forming a semiconductor film covering the bottom of the hole and the first insulating and the first conductor films in the walls of the hole;
- forming a fourth insulating film covering the inside walls of the hole in such a way that a part of the semiconductor film on the third insulating film is exposed;
- and
- forming a second conductor film being connected to the exposed semiconductor film.
Dependencies are inferred from the claim text.