Method and circuit for transferring differential binary signals
AssigneeBull SAS
InventorGeorges Neu
Life of this patent
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Abstract
A method for transferring an element of binary information of the differential type present on two first bit lines to two second bit lines through a differential amplifier. The method includes a precharging phase followed by an evaluation phase of the first bit lines. The precharging phase consists of short-circuiting the first bit lines to each other and short-circuiting at least one of the second bit lines to the first bit lines. Such a differential amplifier may be utilized in an electronic circuit and assembly such as a carry select adder circuit.
Claims15
A method for transferring an element of binary information represented by a differential voltage present on two first input bit lines to two second, separate output bit lines through a differential amplifier, said method comprising the steps of:
- precharging the input lines of the differential amplifier wherein said precharging step comprises the steps of:
- short-circuiting said first input bit lines to each other;
- and
- short-circuiting at least one of said second, separate output bit lines to said first bit lines;
- and evaluating said first bit lines.
A method for transferring an element of binary information represented by a differential voltage present on two first bit lines to two second bit lines through a differential amplifier, said method comprising the steps of:
- precharging said two first bit lines, wherein said precharging step includes the steps of:
- short-circuiting said two first bit lines to each other;
- and
- short-circuiting at least one of said second bit lines to said first bit lines;
- evaluating said two first bit lines;
- wherein said differential amplifier comprises a first differential amplifier having a high internal impedance, and a second differential amplifier having three states and having a low internal impedance during said evaluation phase, and wherein inputs and outputs of said first and second differential amplifiers are connected in parallel;
- and
- wherein said method further includes before the step of short-circuiting said first bit lines the step of placing said second differential amplifier in a sate of high internal impedance during said precharging phase.
An electronic assembly including an electronic circuit for providing at least one binary output represented by a differential voltage present on two bit lines, said two bit lines coupled to two inputs of a differential amplifier, said two bit lines precharged to a given voltage during a precharging phase which is followed by an evaluation phase, said circuit comprising:
- first means for short-circuiting said two bit lines;
- and
- second means for selectively short-circuiting at least one of two output lines of the differential amplifier to at least one of said two bit lines, wherein said first and second means are activated during said precharging phase and wherein when said second means is not activated each of said two bit lines are electrically isolated from each of said two output lines of the differential amplifier.
A method for transferring an element of binary information represented by a differential voltage present on two first input bit lines to two second, separate output bit lines through a differential amplifier, said method comprising the steps of:
- precharging the input lines of the differential amplifier wherein said precharging step comprises the steps of:
- short-circuiting said first input bit lines to each other;
- and
- short-circuiting at least one of said second, separate output bit lines to said first bit lines;
- and evaluating said first bit lines;
- short-circuiting said two second, separate output bit lines to each other during said precharging step;
- wherein said differential amplifier comprises:
- a first differential amplifier having a high internal impedance;
- and
- a second differential amplifier having three states and having a low internal impedance during said evaluation phase, and wherein inputs and outputs of said first and second differential amplifiers are connected in parallel;
- and wherein said method further includes before the step of short-circuiting said first bit lines the step of placing said second differential amplifier in a state of high internal impedance during said precharging step.
Dependencies are inferred from the claim text.